Specifications

13
安捷倫科技高頻元件量測研討會
2/23/2006
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Plan and Actions for PKG Design
Substrate Design Integrity Electrical Performance
-Design Integrity Electrical performance flow
-Design Rule and Constraint setting for SiP PKG Application,
like RF Module, optical and wireless PKG
Active/Passive Device analysis capability
-Embedded passive (RF-MEMS, Substrate embedded RLC)
analysis and IP-development
-Sub-system measurement capability setting for advanced PKG
Co-Design and Co-development with key partners
-Co-working with key partners for more close and detail study
in Wireless, Optical or RF module
安捷倫科技高頻元件量測研討會
2/23/2006
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Contacts
Contacts
z Samuel_Wu, Leader of Electrical Lab
E-mail: samuel_wu@aseglobal.com
Phone: 886-7-3617131 ext. 15290/85290
Fax: 886-7-3613094
z Mark_Li, Project Engineer of Electrical Lab
E-mail: Mark_li@aseglobal.com
Phone: 886-7-3617131 ext. 15291/85291
Fax: 886-7-3613094
ASE, Inc (Kaohsiung)
26, Chin 3rd Rd.,
811, Nantze Export Processing Zone
Kaohsiung, TAIWAN
Website: www.aseglobal.com