Technical data

Table 46
Name Description under
:LEVel[?] “SOURce8[:JITTer]:SINusoidal:LEVel[?]
” on page 216
:DISTribution[?] “SOURce8
[:JITTer]:SINusoidal:DISTribution[?] ” on
page 216
SOURce8[:JITTer]:SINusoidal[:STATe][?]
IAgilentN490xJSinoidal.Enable
SOURce8:SINusoidal[:STATE] ON | OFF | 1 | 0
SOUR8:SIN?
Turns the generation of sinusoidal jitter on or off.
The query returns the present setting (0 | 1).
SOURce8[:JITTer]:SINusoidal:CLOCk[?]
IAgilentN490xJSinusoidalModulatedClock
SOURce8:SINusoidal:CLOCk PURE | MODulated
SOUR8:SIN:CLOC?
Selects the property of the clock that is provided by the pattern generator's CLK
OUT port:
• PURE: The clock remains unmodulated.
• MODulated: The clock at CLK OUT is modulated.
The query returns the present setting (PURE | MOD).
SOURce8[:JITTer]:SINusoidal:FREQuency[?]
IAgilentN490xJSinoidal.ModulationFrequency
SCPI Command Reference 5
Agilent J-BERT N4903B High-Performance Serial BERT 215
IVI-COM Equivalent
Syntax
Description
IVI-COM Equivalent
Syntax
Description
IVI-COM Equivalent