Keysigth Technologies N4903B J-BERT

dataTec ▪ Ferdinand-Lassalle-Str. 52 ▪ 72770 Reutlingen ▪ Tel. 07121 / 51 50 50 ▪ Fax 07121 / 51 50 10 ▪ [e-mail] ▪ www.datatec.de
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10 | Keysight | J-BERT N4903B High-Performance Serial BERT, 7 Gb/s and 12.5 Gb/s - Data Sheet
Pattern Generator Specications continued
Data output and auxiliary data output DATA T AX DATA T
Table 2. utput characteristics for J-BERT N4903B generator. All timing parameters are measured at E levels
Range of operation
5
150 Mb/s to 14.2 Gb/s (Option D14, required in addition to C13 or G13)
150 Mb/s to 12.5 Gb/s (Option C13 or G13); can be programmed up to 13.5 Gb/s
150 Mb/s to 7 Gb/s (Option C07 or G07);
< 620 MHz only with external clock
Frequency accuracy ± 15 ppm typical
Format NRZ, normal or inverted
Electrical idle Output transitions from full swing signal to 0 V amplitude and vice versa at constant offset within 4 ns typ. Electrical
idle is controlled by the error add input connector
Amplitude/resolution 0.050 V to 1.800 V, 5 mV steps; addresses LVDS, CML, PECL, ECL (terminated to 1.3 V/0 V/-2 V), low voltage CMOS
Output voltage window - 2.0 V to +3.0 V
Predeined levels ECL (-2V), SCFL (0V), LVPECL (1.3V), LVDS (1.25V), and CML (0V)
Transition times
20% to 80%
10% to 90%
1
< 20 ps
< 25 ps
Intrinsic jitter
4
9 ps pp typical with internal clock
Clock/data delay range ± 0.75 ns in 100 fs steps
Auto-calibration possible to compensate for temperature drifts
External termination voltage
2
- 2 V to +3 V
Crossing point Adjustable 20% to 80% typical to emulate duty cycle distortions
AUX data modes: – Sub-rate clock mode: can be used to generate lower rate reference clocks with divider factor n = 2, 3, 4, 5, ... 128
relative to data rate. This is the same function as the sub-rate clock output of N4903A.
– Pattern and PRBS generation (Option 002). Can be used to drive a multiplexer such as N4876A (requires SW 6.7
or later) and as independent second data channel (requires SW 7.0 or later).
Skew < 15 ps typical between data output and aux data output
Single error inject Adds single errors on demand
Fixed error inject Fixed error ratios of 1 error in 10
n
bits, n = 3, 4, 5, 6, 7, 8, 9
Interface
3
Differential or single-ended, DC coupled, 50 Ω
Connector 2.4 mm female
1. At 10 Gb/s and 7 Gb/s
2. or positive termination voltage or termination to GND external termination voltage must be less than 3  below . or negative termination voltage
external termination voltage must be less than 2  below . External termination voltage must be less than 3  above .
3. nused outputs must be terminated with 50  to GND.
4. At target BER 10 -9 with PRBS 231 -1 10 Gb/s
5. hen ption D14 is enabled and data rates are  12.5 Gb/s PJ1  PJ2 range 0 to 2.0 I modulation freuency range 1 z to 100 Mz. RJ range 0 to
20 mI rms 0 to 280 mI pp. or BJ functionality is not guaranteed and might reuire manual calibration. or data rates  13.5 Gb/s SS SJ are
disabled.l).