Technical data

Error Detector
By default, the J-BERT error detector compares all bits from the DUT
with the loopback pattern. With the option in the “Error Detector”
group box, SKP ordered sets can be excluded from bit comparison.
Changing this setting (Figure 11) to ignore 8b/10b SKP ordered sets
or 128b/130b ordered sets is usually required when the DUT uses its
own reference clock.
Output Parameters
In the upper right part of the main window, as shown in Figure 12,
you can adjust the following parameters of the J-BERT:
Timing
Voltage levels
De-Emphasis
Jitter and SSC
Sinusoidal interferences
Timing
Click “Timing Setup” to open the timing setup window. Here you can
define the data rate and add some deviation to it. The reference clock
can also be modified, but keep in mind that the valid range and
granularity is restricted by the J-BERT hardware.
18 N5990A-301 Getting Started Guide
Figure 12: Output Parameters
Figure 11: Error Detector Settings