Technical data

In the simplest case, a custom pattern file can be a text-file
containing only hexadecimal data. Note that the binary data
represented by this file must have a 512 bit granularity; otherwise,
the pattern cannot be loaded into the J-BERT's pattern memory. The
syntax of the selected file is automatically verified before the file can
be used. For details about the syntax and the possibilities of custom
pattern files, please refer to the “PCI Express Link Training Suite
Language Guide”.
When the Complaince Pattern is used in PCI Express Gen 3, the
generator's equalization preset hint is also encoded in the pattern.
The encoded value can be manually changed.
Clock Tolerance Compensation
In this group box you can select how SKP ordered sets are inserted
into the training and loopback pattern. By default, no extra SKP
ordered sets are generated (except at points where the PCI Express
specification explicitly requires them, e.g. in the Gen 3 modified
compliance pattern).
When the DUT has it's own reference clock, and no SSC is used
(“SRNS”, Separate Reference Clocks with No SSC), SKP ordered sets
must be inserted at an interval defined in the PCI Express
specification. When the DUT has it's own reference clock, and SSC is
used on both the generator and the DUT side (“SRIS”, Separate
Reference Clocks with Independent SSC), SKP ordered sets must be
inserted in even shorter intervals.
Changing the “SKP Ordered Set Insertion” option (Figure 10) defines
how often SKP ordered sets are inserted. Note that the gap between
two SKP ordered sets might be shorter than required by the
specification, in order to fit the pattern into the J-BERT's pattern
memory.
Note that when a custom loopback pattern is used, there are no SKP
ordered sets inserted into the custom pattern.
17 N5990A-301 Getting Started Guide
Figure 9: Loopback Pattern Settings
Figure 10: Clock Tolerance Compensation Setting