Technical data

Status Reporting 6
Agilent Infiniium 90000 Series Oscilloscopes Programmer's Reference 109
Mask Test Event Register
This register hosts the following bits:
• Mask Test Complete bit (bit 0)
• Mask Test Fail bit (bit 1)
• Mask Low Amplitude bit (bit 2)
• Mask High Amplitude bit (bit 3)
• Mask Align Complete bit (bit 4)
• Mask Align Fail bit (bit 5)
The Mask Test Complete bit is set whenever the mask test is complete.
The Mask Test Fail bit is set whenever the mask test failed.
The Mask Low Amplitude bit is set whenever the signal is below the mask
amplitude.
The Mask High Amplitude bit is set whenever the signal is above the mask
amplitude.
The Mask Align Complete bit is set whenever the mask align is complete.
The Mask Align Fail bit is set whenever the mask align failed.
If any of these bits are set, the MASK bit (bit 9) of the Operation Status
Register is set. The Mask Test Event Register is read and cleared with the
MTER? query. The register output is enabled or disabled using the mask
value supplied with the MTEE command.