Specifications

Chapter 7: Theory of Operation
Backplane Assembly
128
The fundamental sample clock is a single- ended 10 GHz signal distributed to each Oak
module and the Wahoo timebase IC through semi- rigid coax. In each case, the single-
ended signal is converted to a differential signal using a bandpass filtered 180° phase
splitter implemented using microwave structures on shielded inner layers of the PCB.
The Wahoo timebase IC divides the 10 GHz CW clock down into multiple 1 GHz and
250 MHz clocks. The 1 GHz DigClk clocks are gated by DigRun so that the ADCs can
be synchronized with each other. Wahoo also performs some of the time interpolator
functionality by synchronizing the system trigger to the 1 GHz DigClk and generating
the first two MSBs of the trigger interpolation value.
The 10 GHz SampClk 10G signal is divided down to 1 GHz for use as TbClk and DigClk.
TbClk is divided by four to generate RefClk, which drives the memory controllers and
the calibrator chip. These four 250 MHz outputs are phased in quadrature to minimize
the coupling of sub- harmonics into the DigClk signals. The RefClk signal that goes to
the calibrator chip must be disabled when not in used by the calibrator system.
SysTrig is the primary output from the trigger system. It is synchronous to the trigger
event and asynchronous to the time base clock, TbClk. Wahoo synchronizes SysTrig to
the timebase clock with low probability of metastability, producing the TbTrig signal.
TbTrig pulses high once immediately after every rising edge of SysTrig.
Wahoo also produces a trigger signal that is synchronous to RefClk. This signal, RefTrig,
pulses high once immediately after every rising edge of SysTrig. RefTrig tells the memory
controller when a trigger event has occurred. It is important to note that although
DigRun and RefTrig are both synchronous to RefClk, their phase relationship to RefClk
s not important. As long as their phase relationship is consistent, the memory controller
can adjust for it. Finally Wahoo records the phase relationship between RefTrig and
TbTrig, and provides it as the 2- bit digital value, Nosc. Nosc[0] is driven by the 500
MHz clock and Nosc[1] is driven by the 250 MHz clock.
10 GHz Clock Generation
The fundamental frequency reference of the oscilloscope's timebase clock is a low- noise
precision 10 MHz signal. This 10 MHz reference can originate from the internal oven-
controlled crystal oscillator or from an external 10 MHz reference signal. Fine frequency
adjustment of the internal crystal oscillator is possible with a DAC line (OSC_FREQ_ADJ).
During calibration you can use a precision 10 MHz source to tune the frequency. A
bandpass- filtered, AC- coupled copy of either the internal 10 MHz reference or a user-
selectable external 10 MHz reference is sent through a cable to a rear- panel BNC
connector for use as a reference source for some other instrument. This connection is
a 50 Ohm output designed to drive a single 50 Ohm input. When phase- locking multiple
instruments, the 10 MHz references are usually daisy- chained together. Refer to Figure
7- 7 for a block diagram showing clock generation.