Specifications

Chapter 7: Theory of Operation
Backplane Assembly
126
Main FPGA
The main FPGA (field- programmable gate array) is the only communication link from
the oscilloscope hardware to the PC system. All system controls and data pass through
the main FPGA. Figure 7- 6 shows the connections to the main FPGA
Figure 7-6 Main Communication FPGA Connections.
During a successful power- up, an EPROM configures the FPGA over a serial bus. The
PROM comes pre- loaded with the required bits, but can be re- programmed through the
FPGA by software, or through the FPGA JTAG port with a programming cable.
The FPGA is a device on the PCIe bus. A custom cable connects a PCIe slot on the PC
motherboard to the backplane board. When Windows is booted up, the main
communication FPGA must show up in the device listing (as Infiniium Acquisition) for
the oscilloscope application to run and control the oscilloscope hardware.
The main FPGA can be used to control peripherals and fan speed, configure and
communicate with other FPGAs, and pass sampled data to the PC for reconstruction
of the measured waveform on the oscilloscope display. In addition, the FPGA generates
PCI interrupts for all oscilloscope- related special events such as a front- end overload
or a stopped cooling fan.
The main FPGA uses five identical buses to communicate with five different downstream
FPGAs. The buses are 8- bit parallel buses with miscellaneous control signals. One bus
is used to control the trigger FPGA in the backplane board, and the other buses connect
to each of the four acquisition assemblies. A separate bus for each FPGA minimizes
timing problems and reflections. The FPGAs on the acquisition boards are used to
control the oscilloscope functions on each of those boards. On power- up, after the PC
software recognizes the acquisition assembly, it loads the trigger FPGA and the
acquisition FPGAs using these buses. When programming is complete, the PC
communicates with these FPGAs over the same buses. The main FPGA provides access
to the memory controllers over a separate bus to each acquisition board. The acquired
data is retrieved from the acquisition boards over these buses.
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