Specifications

4-23
Operating Features and Specifications
Measurement Period
Gating Period Definition
• Time - 1 second to 99 days, 23 hours, 59 minutes, 59 seconds.
• Errors - 10, 100 or 1000.
• Bits - 1E07 to 1E15 bits.
All gating periods to 0.1s resolution.
Refer to Measurements on page 4-18 for details of the effect of switching the detector's
Gating Input during gated measurement periods.
Burst gating
Burst gating is always used together with the error detector GATING INPUT and is
available only with PRBS patterns 2^31−1, 2^23−1, 2^15−1, 2^10−1 and 2^7−1.
Although the Gating Input enables the clock and bit error counters, where the data input is
not continuous, the Gating Input is often not sufficient to allow the detector to be kept
synchronized throughout a series of bursts of the selected pattern. The only exception to
this is where the data input pattern resumes, at the time when the Gating Input becomes
active, from the pattern bit which would have been received had the data been continuous.
In this special case selecting manual Sync Mode, once pattern synchronization has been
gained. prior to the first deactivation at the Gating Input will allow error free reception. In
all other circumstances where the data input is not continuous, for example in the testing
of optical fibre loops, the instrument's Burst Gating mode should be selected.
A further requirement of this mode of operation is that a clock is provided at the Error
Detector's clock input all the time. Should it be necessary to use a clock recovered from
the data input during the measurements. then an external switch should be deployed to
switch between the recovered clock and a continuous clock (e.g. from the Pattern
Generator). In this configuration the switch should select the recovered clock whenever it
is available but the Gating Input should only go active after the recovered clock has
established a stable amplitude and a fixed phase with respect to the burst of pattern data
bits. Similarly the Gating Input should be deactivated prior to either the onset of any
transients in the recovered clock or the end of the data burst.
While in burst gating mode the error detector:
• Attempts to synchronize to the incoming data on every low to high transition of the
Gating Input.
• Following each synchronisation attempt the detector counts bits and errors while the
Gating Input remains high.
• As is the normal function of the Gating Input, all measurement counters are disabled
whenever the Gating Input is low.