Specifications

4-16
Operating Features and Specifications
Gating Input
Interface
Format: RZ, active high.
Interface: dc coupled.
Impedance: 50Ω nominal.
Amplitude: High: 0V nominal; Low: −0.4 V nominal.
Pulse Width: For 1-bit error: 16 clock periods nominal or stretched 200 ns.
Connector: BNC female connector.
Gating Input
The Gating Input is used to enable the error counters including during burst gating mode.
In both these cases the error counters will always be enabled for a multiple of 32 pattern
bits. When the Error Detector's clock and data inputs are continuous the Gating Input
alone provides sufficient control of the bit error counting functions. If, however, the data
input is not continuous then this input should be used together with the Burst Gating
mode described under Gating Menu on page 7-35.
The error counter control provided by the Gating Input is independent of the
Measurement Gating configured via the Error Detector gating control configuration
menu and controlled via and . Refer to Measurements on
page 4-18 and Measurement Period on page 4-22.
Interface
Levels: TTL levels (see note below).
Pulse Width: 10µs at 100 MHz; 1µs at 10 GHz.
Connector: BNC female connector.
NOTE Connecting an external termination to the gating input will pull it low
and disable the instrument error counters. Gating resumes when the
Gating Input returns high.
RUN GATING STOP GATING