Specifications

4-15
Operating Features and Specifications
Errors Output
Features
• Pattern or clock trigger.
Pattern Mode
In pattern mode the pulse is synchronized to repetitions of the output pattern.
PRBS 2^31−1, 2^23−1, 2^15−1, 2^10−1, 2^7−1
Pulse synchronized to repetitions of the pattern. The repetition rate is 1 pulse/32 pattern
repetitions.
All other patterns
Pulse synchronized to repetitions of the pattern. The repetition rate is a function of the
pattern length. The pulse occurs at that lowest common multiple of 256 and the length
example:
• Pattern length = 32767 => 1 pulse/256 pattern repetitions
• Pattern length = 32768 => 1 pulse/pattern repetition
Divided Clock Mode
In divided clock mode the trigger is a square wave at the clock rate/8.
Specifications
Interface: dc coupled.
Impedance: 50Ω nominal.
Connector: SMA female connector.
Amplitude: High: 0V nominal; Low: −0.4 V nominal.
Errors Output
Provides an electrical signal to indicate received errors. The output is the logical ‘OR’ of
errors in a 32-bit segment of the data.
Features
• Pulse length switchable - RZ or stretched.