Specifications

9-2
Program Examples
Introduction
This appendix provides example programs on clock stabilization, testing and gaining
pattern synchronization and clock to data alignment.
Clock Stabilization
The following example explains the use of BANDswitch? to establish end of “settling
time” following a frequency change. The following code extract gives an example of the
use of the functions in the RMB-UX basic language example program given on page 7-3.
This indicates that only the “FNBertFreqSetld” function need be called directly with the
other functions being called at a lower level.
80 REAL SrcFreq
90 INTEGER Settled
130 Isc = 7 ! GPIB i/f select code
140 Instradr = 8 ! 70843 HSBERT's GPIB address
350 ASSIGN @Instr TO 100*Isc+Instradr
500 SrcFreq=2.4E+9
600 ! configure clock source (This may be independently controlled over GPIB or,
605 ! when using an MMS
610 ! source configured as a “slave” to the BERT, via the BERT's
615 ! “SOURCE9:FREQ” command.)
620 CALL SetSrcFreq( SrcFreq ) ! configure clock source (may be independently
625 ! controlled over GPIB
630
640 ! await BERT establishing its settings for the new frequency.
650 Settled = FNBertFreqSetld( @Instr, SrcFreq )
660 !
670 IF ( Settled ) THEN...
make BERT measurements
800 ELSE
Report that BERT's generator or detector configuration did not
stabilise within the maximum expected time (~30 seconds).
The outcome should cause termination of testing until the cause
is understood. Investigate the cabling of the “CLOCK IN”
and “CLOCK OUT” ports and observe the BERTs behaviour on manually
repeating the configuration changes.
1000 END IF