Specifications

5-22
System Command Reference Section
Pattern Generator TRIGGER OUTPUT
Pattern Generator TRIGGER OUTPUT
The SOURce3:TRIGger commands control the attributes of the pattern generator's
TRIGGER OUTPUT port.
SOURce3:TRIGger[:MODe] PATTern|DCLock
This node is for specifying the mode of the trigger output. The possible modes are:
Pattern The trigger pulse is output coincident with the occurrence, in the
data output stream, of a particular pattern of bits.
Divided ClockThe trigger pulse is simply the input data clock divided by a fixed
value.
The *RST selection is PATTern.
SOURce3:TRIGger:DCDRatio <NR1>
This is a contraction of the phrase divided clock division ratio. It permits the ratio between
frequency of the clock and the frequency of repetition of the trigger to be set up. Values of
8 and 32 are permitted.
The *RST selection is 8.
SOURce3:TRIGger:CTDRatio? <NR3>
The command is short for Clock to Trigger Division ratio. It gives the ratio between the
frequency of the clock output and the frequency of the pulses on the trigger output for the
currently selected pattern.
If alternate patterns are selected and the trigger is set to occur on input, then no division
ratio is available and this command responds with Not-A-Number (NAN, 9.91 x E+37).
SOURce3:TRIGger:PRBS<n> <NRf>{,<NRf>}
This command sets the pattern, the occurrence of which causes a trigger pulse to be
output. The number n must one of 7, 10, 15, 23 or 31. The number of parameters depends
on the pattern length, and is the minimum that can define a unique place in the overall
pattern, for example a pattern of length 2
n
−1 the number of parameters is n. The parameter
values are either 1 or 0. An all-ones pattern is disallowed.
The *RST selection is ALL ZEROS for n = 1 through 4.