Specifications

11-25
Performance Tests
Error Detector Performance Tests
Error Detector Performance Tests
Ensure the pattern generator used in the following tests has passed all performance tests
and meets its published specifications.
Clock Input Level Alarm
1. Connect the clock source RF output to the error detector CLOCK INPUT port and to
the power meter via a power splitter as shown in Figure 11-13.
Figure 11-13
2. Set the clock source frequency to 10 GHz and output level to 0 dBm. The clock loss
alarm should be off.
3. Reduce the output level of the clock source until the clock loss alarm appears on the
display and the CLOCK LOSS LED is illuminated on the HP 70843 front panel. This
should occur at a power level less than or equal to −3dBm.