User`s guide

192 Appendix B
Input Fields and Allowable Ranges
Attenuation:
RF In:
RF Out:
Off, On
0.0 to 99.9 dB in 0.1 dB steps
0.0 to 99.5 dB in 0.5 dB steps
Network Config: 0 to 999 (MCC), 0 to 99 (MNC), 0 to 7 (NCC), 0 to 65535 (NCC), 2 to 9 (BS_PA)
Date/Time: 1990 to 2089 (YYYY), 01 to 12 (MM), 01 to 31 (DD)
00 to 23 (HH), 00 to 59 (MM)
Firmware:
Update:
New Firmware:
X.XX.XX
Off, On
Y.YY.YY [when Update is On]
Configuration:
Condition
MS Power Class: 2 to 5 1 to 3 1 to 3
PWR CNTL
High:
Mid:
Low:
Manual Test:
2: +39 dBm to
19: +5 dBm
29: +36 dBm to
31: +32 dBm,
0: +30 dBm to
15: 0 dBm
30 +33 dBm to
31: +32 dBm,
0: +30 dBm to
15: 0 dBm
Averaging: Off, 2 to 99
RF Output: Auto, On
BS Level: −110.0 to −50.0 dBm in 0.5 dB steps
BER BS Level: −110.0 to −50.0 dBm in 0.5 dB steps
BER Frames: 1 to 13000 frames in 1 frame steps [# of bits shown]
Loopback Delay: Short, Mid, Long
Limit Setting:
Peak TX Power
:
PWR CNTL
a
Template, or −99.9 to +99.9 dB in 0.1 dB steps
2: +39 dBm to
19: +5 dBm
29: +36 dBm to
31: +32 dBm,
0: +30 dBm to
15: 0 dBm
30 +33 dBm to
31: +32 dBm,
0: +30 dBm to
15: 0 dBm
Burst Timing: −9.9 to +9.9 bits in 0.1 bit steps
Power Ramp: Template
Phase Error
RMS/Peak: 0.0 to 99.9 ° in 0.1 ° steps
Frequency Error: −999 to + 999 Hz in 1 Hz steps
BER: 0.00 to 99.99% in 0.01% steps
FER: 0.00 to 99.99% in 0.01% steps
BLER: 0.00 to 99.99% in 0.01% steps
RX Quality: 0: < 0.2%, 1: 0.2 to 0.4%, ..., 6: 6.4 to 12.8%, 7: > 12.8%
RX Level: 0: < −110 dBm, 1: −110 to −109 dBm, ..., 62: −49 to −48 dBm, 63: > −48
DC Current
Camp On:
Talk:
3 to 1000 mA in 1 mA steps
3 to 1000 mA in 1 mA steps