Specifications

9
The state analysis capabilities of the 16850 Series allow it to make measurements and analysis on DDR2 and DDR3 memories up to
DDR2/3 1333 (667 MHz clock) on address and control lines. Memory bus decode, compliance testing, and performance analysis are
available in state mode only with related orderable tools.
DDR2 memory DDR3 memory
Addr/Cmd only Up to DDR2 1333 (667 MHz clock) state measurements
on Addr/Cmd only. (No Data)
Up to DDR3 1333 (667 MHz clock) state measurements
on Addr/Cmd only. (No Data)
Requires 34 channel model or higher (one U4201A cable required providing two 90 pin pods)
Related Orderable SW Tools (State mode only):
• B4621B Bus Decoder for DDR, DDR2, DDR3, DDR4 Debug and Validation (Only DDR2 and DDR3 are supported
with the 16850 Series logic analyzer.)
• B4622B Protocol Compliance and Analysis Toolset for DDR/2/3/4, and LPDDR/2/3 (Only DDR2 and DDR3 are
supported with the 16850 Series logic analyzer.)
Supported probes with configuration files:
• x16 Addr/Cmd/Data DDR2 BGA probe (W2631B)
(Requires E5384A ZIF probe)
1
• x8 Addr/Cmd/Data DDR2 BGA probe (W2633B)
(Requires E5384A ZIF probe)
1
Supported probes with configuration files:
• x16 Addr/Cmd/Data DDR3 BGA probe (W3631A)
(Requires E5845A ZIF probe)
1
• x8 Addr/Cmd/Data DDR3 BGA probe (W3633A)
(Requires E5847A ZIF probe)
1
FS2372 DDR3 DIMM interposer (Addr/Cmd only)
FS2374 DDR3 SODIMM interposer (Addr/Cmd only)
Addr/Cmd/Data Up to DDR2 800 (400 MHz clock) timing measurements
using 2.5 GHz timing analyzer with deep memory
(for 3:1 ratio of sample rate to data rate)
Up to DDR3 800 (400 MHz clock) timing measurements
using 2.5 GHz timing analyzer with deep memory
(for 3:1 ratio of sample rate to data rate)
Requires 68 channel model or higher (two U4201A cables using three of the four 90 pin pods provided)
Supported probes with configuration files:
• x16 Addr/Cmd/Data DDR2 BGA probe (W2631B)
(Requires E5384A ZIF probe)
• x8 Addr/Cmd/Data DDR2 BGA probe (W2633B)
(Requires E5384A ZIF probe)
Supported probes with configuration files:
• x16 Addr/Cmd/Data DDR3 BGA probe (W3631A)
(Requires E5845A ZIF probe)
• x8 Addr/Cmd/Data DDR3 BGA probe (W3633A)
(Requires E5847A ZIF probe)
For higher speed memory analysis or greater channel count refer to the U4154A logic analyzer module.
1. Data pod is not connected for State measurements when used with the 16850 Series. Simultaneous State mode capture of Read and
Write data requires a U4154A high-performance logic analyzer module with dual sample mode.
Validate your DDR2 and DDR3 Memory Systems