Specifications
3
Industry’s Fastest Timing Capture with Deep Memory ― for Fast Digital
System Debug
Figure 1. With four models to choose
from, and options to upgrade state speed
and memory depth, you can get a logic
analyzer with measurement capabilities
that meet your needs.
Agilent 16850 Series portable logic analyzers offer the highest performance,
with deep, high speed timing and state measurements, combined with the
applications and usability your digital development teams need to debug their
modern systems ― and at a great price.
Automate the capture of
internal FPGA signals
16850 Series logic analyzers, used
with the FPGA Dynamic Probe, let you
probe internal FPGA nets on Xilinx
and Altera devices with deep memory
and through an automated process
• No block RAM required
• Move probe points without stop-
ping the FPGA or changing design
timing
• Import signal names automatically
from the FPGA design
• Automatically map FPGA pins
to logic analyzer input channels
(Xilinx)
• B4655A (Xilinx) B4656A (Altera)
Decode DDR2/3 memory
Addr/Cmd buses and perform
compliance and performance
analysis
The logic analyzer’s timing and state acquisition gives you the
power to:
• Observe timing relationships far away from the trigger point using 2.5 GHz
(400 ps)/5 GHz (200 ps) full/half channel timing with up to 128 M samples
• Measure more precise timing relationships in the vicinity of the trigger point
using 12.5 GHz (80 ps) Timing Zoom (256 K samples)
• Find anomalies separated in time with memory depths upgradable to 128 M
• Probe a variety of technologies with single-ended and differential attachment
options with the highest signal integrity
• Buy what you need today and upgrade in the future. 16850 Series logic ana-
lyzers come with independent upgrades for state speed and memory depth
• Sample synchronous buses up to 1400 Mbps data rates accurately using eye
scan to automatically adjust threshold and setup/hold
• Easily track problems from symptom to root cause across several measure-
ment modes by viewing time-correlated data in waveform/chart, listing,
inverse assembly, source code, or compare display
• Identify potential signal integrity issues on high data rate signals by observing
an analog view of all input channels via logic analyzer probing with “eye
scan”
• Set up triggers quickly and confidently with intuitive, “simple,” “quick,” and
“advanced” triggering options
• Time correlate and import oscilloscope/mixed-signal traces into the logic
analyzer Waveform window for even greater system insight