User`s guide

Appendix B 507
Status Reporting System
General Status Register Model
B. Status Reporting System
Event Register
Reflects the corresponding condition of the E5061A/E5062A (e.g., occurrence of an event)
as a bit status. These bits continuously monitor changes in the E5061A/E5062A’s state and
change the bit status when the condition (e.g., change bit status to “1” if a specific event
occurs) for each bit is met. You cannot change the bit status by issuing a SCPI command.
Enable Register
Setting the enable register allows you to specify event register bits that can set “1” to the
summary bit of the status byte register when an event occurs. The register bits work as
mask bits; setting “1” to an enable register will enable a corresponding bit in the event
register.
For example, when you want to set “1” as the summary bit in the status byte register by a
specific register condition, set the corresponding enable register to “1.”
Status Byte Register
If the enabled event register is set to “1,” a corresponding bit of the status byte register is
also set to “1.” This register also indicates the output queue and SRQ status.
The value of the status byte register can be read by using the *STB? command on page 201
command or serial poll (SPOLL statement in HTBasic) from the controller.
Reading the status byte register by using the *STB? command does not affect the contents
of the status byte register. However, reading it with the SPOLL statement of HTBasic will
clear the RQS bit in the status byte register.
Also, setting the service request enable register using the *SRE command on page 200
command can generate a service request synchronously with the status byte register.