User`s manual

PTRansition sets the positive transition. For each bit unmasked, a 0 to 1

transition of that bit in the Condition Register sets the associated bit in the

Event Register.

<unmask> is the decimal, hexadecimal (#H), octal (#Q), or binary (#B)

value of the Condition Register bit to be unmasked. (Bits 0, 3, 6, and 8 have

corresponding decimal values of 1, 8, 64, and 256.)

The Event Register The Event Register latches transition events from the Condition Register as

specified by the Transition Filter. Bits in the Event Register are latched and

remain set until the register is cleared by one of the following commands:

STATus:OPERation[:EVENt]?

*CLS

The Enable Register The Enable Register specifies which bits in the Event Register can generate

a summary bit which is subsequently used to generate a service request.

The AFG logically ANDs the bits in the Event Register with bits in the

Enable Register, and ORs the results to obtain a summary bit.

The bits in the Enable Register that are to be ANDed with bits in the Event

STATus:OPERation:ENABle <unmask>

unmask> is the decimal, hexadecimal (#H), octal (#Q), or binary (#B)

value of the Enable Register bit to be unmasked. (Bits 0, 3, 6, and 8 have

corresponding decimal values of 1, 8, 64, and 256.)

The Enable Register is cleared at power-on, or by specifying an

value of 0.

Program Example The OSG_RQS program sets up the Operation Status Group Registers to

determine when the AFG enters the wait-for-arm state. When the AFG

enters that state, a service request interrupt is sent to the computer which

responds with a message indicating the state which exists.

The steps of the program are:

1. Set the bit transition which will latch the event (entering wait-for-arm

state) in the Event Register.

STATus:OPERation:NTRansition <unmask>

STATus:OPERation:PTRansition <unmask>

436 AFG Status Chapter 9