User`s manual

STATus

The STATus subsystem controls the SCPI-defined Operation and Questionable

Signal status registers. Each is comprised of a Condition Register, an Event

Each Status Register works as follows:

When a condition occurs, the appropriate bit in the Condition Register is set or cleared.

If the corresponding transition filter is enabled for that bit, the same bit is set in the

associated Event Register. The contents of the Event Register and the enable mask are

logically ANDed bit-for-bit; if any bit of the result is set, the Summary bit for that

Operation Status

Only bits 0 (calibrating), 3 (sweeping), 6 (waiting for arm), and 8 (initiated) are

defined for the Agilent E1445A. All other bits are always zero.

Bit 0 - Calibrating: Set (1) during the execution of the

CALibration[:DC]:BEGin

command. Cleared (0) at the end of DC calibration or if calibration is aborted.

Bit 3 - Sweeping: Set (1) while a frequency sweep or list is in progress.

Cleared (0) when waveform generation is halted, when frequency sweeping or

lists are not selected, and at the end of each sweep or list.

Bit 6 - Waiting for Arm:ARM Set (1) when waiting for a start arm. Cleared

(0) when a start arm is accepted or when waveform generation is aborted.

Bit 8 - Initiated: Set (1) by the

INITiate:IMMediate command. Cleared (0)

when waveform generation is complete and the trigger subsystem returns to the

idle state.

Questionable

Signal Status

Only bits 5 (frequency) and 8 (calibration) are defined. All other bits are always 0.

Bit 5 - Frequency: Set (1) when the

[SOURce:]FREQuency2 divide-by-n

frequency generator is selected and the generated frequency differs from the

specified frequency by greater than 1%. Cleared (0) otherwise.

Bit 8 - Calibration: Set (1) if an error has been detected in the non-volatile

calibration memory. Cleared (0) otherwise.

STATus

Chapter 8 Command Reference 381