Specifications

Scan Channel
Configuration
Register
These bits set the channel_list for a scan list, set the type of measurement,
and enable/disable the Tree Isolation switches. Note that the DIR in the
Control Register must be set false to enable this register.
base + 0A
16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Write VLD
A_D B_D
C1C0XXXXXXXD3D2D1D0
D3 - D0 Data bits three to zero. The FET strain gage multiplexer channels and
diagnostics are mapped into bits D3 through D0 as follows:
D3 - D0
0 0 0 0 closes bridge completion channel 0
0 0 0 1 closes bridge completion channel 1
0 0 1 0 closes bridge completion channel 2
0 0 1 1 closes bridge completion channel 3
0 1 0 0 measures the leadwire resistance on bridge completion channel 0
0 1 0 1 measures the leadwire resistance on bridge completion channel 1
0 1 1 0 measures the lower leg of the internal half bridge voltage
0 1 1 1 measures the upper leg of the internal half bridge voltage
1 0 0 0 closes bridge completion channel 4
1 0 0 1 closes bridge completion channel 5
1 0 1 0 closes bridge completion channel 6
1 0 1 1 closes bridge completion channel 7
1 1 0 0 not used
1 1 0 1 not used
1 1 1 0 measures the guard voltage
1 1 1 1 measures the bridge excitation voltage
C1 - C0 Configuration bits. These bits determine the measurement mode as listed
below.
C1 C0
0 0 Volts (strain and diagnostic measurements)
0 1 2-wire ohms
B_D , A_D B and A Tree Isolation Switch disable. A zero (0) in either one disables
the respective Tree Isolation Switch. Generally both disabled together to
equal the
SCAN:PORT NONE command.
VLD Valid Channel. A zero (0) indicates that the specified channel is valid.
When entering a scan list the entire list must be loaded into each
multiplexer. For the channels that are not on that multiplexer, VLD must be
set false.
Appendix D Strain Gage Register-Based Programming 131
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