Specifications

Scan Control
Register
The Scan Control Register allows you to clear the scan list, set the trigger
mode, and reset the pointer to the beginning of the scan list.
base + 06
16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Write Undefined X X X RST
PTR
CNT
EN
IMM
EN
DBS
EN
CLR
SCN
CLR SCN Clear Scan List. A one (1) in this bit clears the scan list. The bit must be
set back to zero (0) in order for another scan list to be accepted
DBS EN Digital Bus Enable. A one (1) enables the Digital Bus trigger mode. A
zero (0) disables it.
IMM EN Immediate Enable. A one (1) in this bit sets trigger to immediate, which
means that as soon as the first channel is closed by the TRG INT, the entire
scan list is run without any further triggering. Channel advance speed is
determined by the delay time specified. Extremely limited applications.
CNT EN Continuous Enable. A one (1) in this bit enables the card to continually
cycle through the scan list. When this bit is enabled the last channel in a
scan list resets the pointer back to the beginning of the scan list. When this
bit is set to zero (0), the last channel in the scan list generates an interrupt if
the channel is valid (VLD set true (0) - Scan Channel Configuration
Register).
RST PTR Reset Pointer. Resets the pointer back to the beginning of the scan list.
CNT EN true automatically resets the pointer at the end of the scan list.
Scan Channel
Delay Register
The Scan Channel Delay Register sets the SETTling:TIME, the time between
receipt of a channel closing trigger and the "channel closed" pulse. The
delay is 2
n
µsec and
n
has a range of 0 to 15. D3 to D0 set
n
.
base + 08
16
1514131211109876543210
Write Undefined X X X X D3 D2 D1 D0
D3 - D0 Data bits three to zero. These bits designate a number between 0 and 15
for
n
.
130 Strain Gage Register-Based Programming Appendix D
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