User`s manual

152 Index
R (continued)
Register-Based
debugging programs
, 130
input algorithm, 120
output algorithm, 119
programming examples
, 121
Registers
addressing
, 105–110
base address
, 106–107
card status/control, 111
condition register, 93–95
definitions, 109–110
descriptions, 111–118
Device Identification Register, 111
event register
, 93–95
information, 105–142
manufacturer ID, 111
map, 109–110
offset, 108
operation event status, 94
operation status
condition register
, 94
enable register, 94
event register, 94
register, 93-94
port
control/status
, 114
data, 115
delay, 117
handshake, 116
interrupt control, 112
normalization, 118
transfer control
, 113
questionable status
condition register, 95
enable register, 94
event register, 95
register, 93, 95
reading
, 123–124
reset states, 109
standard event register, 93
status register, 93
RES Control Line, 12, 22
controlling, 114
description
, 43
operation, 43
operation of, 114
status, 114
using as output lines, 136
Reset Control Line
See RES
Control Line
Reset States
, 33, 43, 109
Resetting Module, 122
Ribbon Cable
connecting, 25
pins, 24–25
replacement, 12
*RMC
, 98
*RST, 33, 43, 98
S
*SAV, 98
SCPI
drivers, downloading, 13
status registers, 93
version query, 97
SCPI Commands, 57, 99–101
abbreviated, 58
abbreviated commands, 58
command separator, 58
DISPlay subsystem, 61–63
format used, 14, 57–59
handshake modes, 34, 44
implied
, 14, 58
implied commands, 58–59
linking, 59
long form, 14, 58
MEASure subsystem, 64–67
MEMory subsystem, 68–71
multiple port operations
, 37, 53
optional, 14, 58
optional parameters, 14, 59
parameters, 14, 59
quick reference, 99–101
reference
, 60
short form
, 14, 58
[SOURce:] subsystem, 72–92
specifying, 14
STATus subsystem, 93–95
SYSTem subsystem, 96–97
[:type] keyword substitutions, 37, 53, 59, 64–66,
76–85
Secondary Address, 31
Select Code Interface, 31
Selecting Interrupt Line, 20
Setting
address switch, 18, 31
CTL line
polarity
, 33, 42–43, 74
value, 75
data lines polarity, 82
FLG line polarity, 33, 42–43, 86