User manual

Programmer’s Guide Page 57 of 66
AcqrsD1_configMemory(instrID, 100000, 1);
AcqrsD1_configExtClock(instrID, 4, threshold, 0, 0.0, 0.0);
AcqrsD1_acquire(instrID); // start the acquisition
 Generate 5000 bursts of 200 clock pulses at the required frequency. At the
end, you need to generate ≥ 160/320/640 additional clock pulses.
AcqrsD1_waitForEndOfAcquisition(instrID, timeOut);
AcqrsD1_readXXXWform(instrID, . . .);
The 320 (640 on 2 GS/s, or 1280 on 4 GS/s digitizers) extra clocks could be generated by 1 or more extra bursts of
200 clock cycles or a special burst. There is no risk of overwriting the earliest data, since the memory is not circular
in this mode.
Comments valid for both termination mechanisms:
Although the function AcqrsD1_acquire sets it to the ready state, the digitizer cannot actually record data while the
external clock is idle. The clock burst must start after the digitizer has been started, and it must start in a very clean
way, i.e. the first pulse must be already well over the threshold and its width must be ≥ 1 ns.
The digitizer sees the multiple clock bursts as a single acquisition. It knows neither the sampling frequency, nor the
time difference between the waveforms. It simply acquires a number of data points. In termination mechanism (2) it
also records the extraneous points and then stops.
When reading the data, the multiple waveforms appear as a contiguous waveform. The only way of distinguishing
one waveform from the other is by counting samples, i.e. the first 2000 samples belong to the 1
st
waveform, the next
2000 to the 2
nd
etc. It is therefore imperative to exactly control the number of clocks in a burst.
NOTE: If the time difference between 2 bursts is > 100 ns, the digitizer tends to drift into saturation, from which it
has to recover when the next burst resumes. The first data sample of such a burst is thus invalid. In many cases, this
first data sample is sufficiently different from the rest of the waveform that it can serve as a ‘segment marker’.
NOTE: Digitizers that have more than one converter/channel (DC211, DC240, DC241, DP210, DP211, and
DP214) will generate two (four-for theDC211) data samples for each sampling interval. You must dimension your
acquisition and readout for twice (4x) the normal amount of data and can then either, drop the extra data sample
from the record, or average the data values which could enhance the signal to noise ratio.
3.18. AS bus Operation
The AS bus and AS bus 2 are intended to synchronize a number of similar CompactPCI modules, in order to make
them appear as a single instrument with more channels. After a number of digitizers have been combined with the
functions AcqrsD1_multiInstrAutoDefine (or AcqrsD1_multiInstrDefine for AS bus only), each combined
instrument can be controlled, when using its instrumentID, with the same functions as single digitizers. We
recommend the use of the automatic function, unless you need special control over the order in which the digitizers
are numbered within the MultiInstrument. Please refer to the function AcqrsD1_multiInstrAutoDefine, for details.
If you mix modules (of the same model number) with different memory lengths, you must make sure that you never
use more than the shortest memory length available. Otherwise, you will get invalid data on the short memory
modules. Under AS bus, the automatic function always assigns the clock master role to a module with the shortest
memory, with the result that the function AcqrsD1_configMemory refuses to accept memory lengths beyond the
shortest. When configuring manually, you might want to do the same. Otherwise, you need to explicitly check your
requested memory lengths.
3.18.1. Channel Numbering with AS bus
In a MultiInstrument, input channels are numbered from 1 to nbrChannels. The number of channels can be retrieved
with the function call:
Acqrs_getNbrChannels(instrID, &nbrChannels);
Channel 1 corresponds to channel 1 of module 0. Channel numbers increase first through module 0, then through
modules 1, 2 etc.
For Acqiris CC10x crates when a MultiInstrument is defined with AcqrsD1_multiInstrAutoDefine, module 0 is
always closest to the controller slot (in Acqiris CC10x crates), whereas with AcqrsD1_multiInstrDefine, it
corresponds to the first module in the initializing list. The Acqiris CC121 crates have a different ordering; please
refer to the Acqiris CC121 CompactPCI Crate User Manual.