User manual

Programmer’s Guide Page 50 of 64
NOTE: When using this capability please make sure that the module is correctly synchronized on the signal. This
might require adjusting the threshold. If this is not the case the data will be useless and calibration can fail in rather
obscure ways.
3.16.2. External Clock (Continuous)
The continuous external clock mode (clockType = 1) permits the application to the digitizer of a continuous,
constant frequency, external clock in order to sample at an arbitrary frequency. This mode uses normal triggering,
from the input signal or through the external trigger input
We need to distinguish between first generation digitizers (models DP105, DP106, DP110, DP111, DP210, DP211,
DP212, DC110, DC240, DC265, DC270), second generation digitizers of the DC271-FAMILY (models DC135,
DC140, DC211, DC211A, DC241, DC241A, DC271, DC271A, DC271AR, DP214, DP235, DP240), the
AP240/AP235 signal analyzer platforms, the AC210/AC240/SC210/SC240 analyzers, and the 12-bit-FAMILY
(DC440, DC438, DC436, DP310, DP308, DP306), and third generation digitizers (10-bit-FAMILY, U1071A-
FAMILY) since their behavior in this mode is quite different. AP200/AP201/AP100/AP101 Averagers and Analyzers
are considered to be first generation modules.
The horizontal control parameters sampInterval and delayTime as defined by AcqrsD1_configHorizontal are
ignored. You need to give the driver the current input frequency and the requested sampling frequency with the
variables inputFrequency and sampFrequency of the function AcqrsD1_configExtClock.
The input frequency inputFrequency must be between
 10 MHz and 500 MHz in the first generation models,
 20 MHz and 2000 MHz for the second generation DC271-FAMILY, U1071A-FAMILY, AC/SC, or
AP240/AP235,
 100 MHz and the value for the maximum allowed frequency for the 12-bit-FAMILY.
Note that for normal operation of Revision B DC4xx and Revision A DP3xx 12-bit-FAMILY digitizers the sFmax
for each converter should be kept between 50 and 110 MHz. Furthermore, the sFmax for these older DC438 and
DP308 units is the same as the sampling frequency.
The acceptable values for sampFrequency are dividers (sFmax/n) of the maximum allowed sampling frequency,
sFmax, where n = 1,2,4,8,20,40,80,200,… The sFmax depends on the model and on the number of combined
channels nbrConvertersPerChannel of AcqrsD1_configChannelCombination:
Model
Input
Frequency
range (MHz)
sFmax vs. nbrConvertersPerChannel
1
2
4
DC122
1000 – 2000
2 × inputFrequency
DC135
20 – 2000
¼ × inputFrequency
½ × inputFrequency
DC140
20 – 2000
½ × inputFrequency
1 × inputFrequency
DC152
200 – 2000
1 × inputFrequency
2 × inputFrequency
DC211/DC211A
20 – 2000
2 × inputFrequency
DC222
1000 – 2000
4 × inputFrequency
DC241/DC241A
20 – 2000
1 × inputFrequency
2 × inputFrequency
DC252
1000 – 2000
2 × inputFrequency
4 × inputFrequency
DC271/DC271A
/ DC271AR
20 – 2000 ½ × inputFrequency 1 × inputFrequency 2 × inputFrequency
DC282
200 – 2000
1 × inputFrequency
2 × inputFrequency
4 × inputFrequency
DC436 Rev B
100 – 200
½ × inputFrequency
DC438
100 – 400
½ × inputFrequency
DC440
100 – 420
1 × inputFrequency
DC440/438 Rev B
100 – 400
1 × inputFrequency
DP1400
20 – 2000
½ × inputFrequency
1 × inputFrequency
DP214
20 – 2000
1 × inputFrequency