Technical data

134 Agilent U7232A DisplayPort Electrical Performance Compliance Test Application
15 Source Intra Pair Skew Single-Ended Tests
Test Condition
Bit Rate: highest bit rates are supported.
Output Level: 800 mVolts.
Pre- Emphasis: 0 dB.
Test Pattern: PRBS 7.
SSC: If the device under test is able to operate either with SSC Enabled or
SSC Disabled then both will be selected. If the device is always SSC
Enabled or always SSC Disabled then the device is tested in its normal
state.
PASS Condition
Intra pair skew ≤ 30 ps
Test R ef er en ce s
See Test 3.5: in the DisplayPort- Compliance Test Specification Version
1.1.
Test Plan Check Mode Turn on test plan check mode to simulate the actual test plan run flow
without actual tests being run.
SSC Acquisitions Number of SSC cycle captured for SSC related tests. Maximum
number is 25.
Low Bit Rate SSC
Smoothing Points
Sets the number of smoothing points for SSC low pass filter when bit
rate is 1.62 Gbps.
High Bit Rate SSC
Smoothing Points
Sets the number of smoothing points for SSC low pass filter when bit
rate is 2.70 Gbps.
Memory Depth Sets the memory depth for acquisition
PRBS Validation Algorithm Settings
PRBS pattern checker
rule
Determine the rules applied to PRBS 7 Pattern detector. By selecting
Strict, test can only proceed with the correct PRBS 7 pattern only.
Single-ended Tests
Intra-pair Skew
Intra Pair Skew Edges Sets the number of edges measured for the intra pair skew test.
Skew Trigger Patterns Define trigger pattern for intra pair skew test.
Table 17 Test Configuration Options
Configuration Option Description