Technical data

Source Total Jitter Tests 4
U7232A DisplayPort Compliance Testing Notes 39
PASS Condition
UI is Unit Interval.
Test R ef er en ce s
See Test 3.12: Total Jitter (TJ) Measurements in the
DisplayPort- Compliance Test Specification Version 1.
Rise-Fall Mismatch Edge Sets the number of edges measured for the rise-fall mismatch test.
Upper Threshold (Debug
only)
Sets the upper threshold used to make a rise time or fall time
measurement.
Lower Threshold (Debug
only)
Sets the lower threshold used to make a rise time or fall time
measurement.
Intra-pair Skew
Intra-pair Edge Sets the number of edges measured for the intra-pair skew test.
AC Common Mode
AC Common Edge Sets the number of edges measured for the AC common mode test.
Table 4 Total Jitter at Internal and Compliance Points.
Transmitter package pin Transmitter Connector (TP2)
High-bit Rate (2.7 Gb/s per lane)
A
p-p
0.260 UI 0.364 UI
Reduced-bit Rate (1.62 Gb/s per lane)
A
p-p
0.160 UI 0.223 UI
Table 3 Test Configuration Options
Configuration Option Description