Technical data

Module 13

SPGU Control and Applications

13-26

Flash Memory – Endurance Test

NOR Write Connection

SMU3

Mech

Selector or ASU ch2

Gate

Drain

Source

SMU1

Substrate

SMU4

PG4

Solid

State

Mech

SMU2

PG2

Solid

State

Mech

PG3

Selector or ASU ch3

Selector or ASU ch1

This is an example setup to perform the write operation of the NOR type flash memory cell. This

setup uses three sets of the SMU, SPGU, and selector/ASU. This setup is used by the Demo-S-

NorFlash Endurance test shown in Class Exercise.

To perform the write operation, all of the selector/ASU channels must make the path to the PG.

Note: The solid state relay is installed in the selector, but not installed in the ASU.