User's Manual
Table Of Contents
- Agilent Technologies 16750A/B Logic Analyzer
- Agilent Technologies 16750A/B Logic Analyzer
- Contents
- Getting Started
- Step 1. Connect the logic analyzer to the device under test
- Step 2. Choose the sampling mode
- Step 3. Format labels for the probed signals
- Step 4. Define the trigger condition
- Step 5. Run the measurement
- Step 6. Display the captured data
- For More Information...
- Example: Timing measurement on counter board
- Example: State measurement on counter board
- Task Guide
- Probing the Device Under Test
- Choosing the Sampling Mode
- To select transitional timing or store qualified
- Formatting Labels for Logic Analyzer Probes
- Setting Up Triggers and Running Measurements
- Displaying Captured Data
- Using Symbols
- Printing/Exporting Captured Data
- Cross-Triggering
- Solving Logic Analysis Problems
- Saving and Loading Logic Analyzer Configurations
- Reference
- The Sampling Tab
- The Format Tab
- Importing Netlist and ASCII Files
- The Trigger Tab
- The Symbols Tab
- Error Messages
- Must assign Pod 1 on the master card to specify actions for flags
- Branch expression is too complex
- Cannot specify range on label with clock bits that span pod pairs
- Counter value checked as an event, but no increment action specified
- Goto action specifies an undefined level
- Maximum of 32 Channels Per Label
- Hardware Initialization Failed
- Must assign another pod pair to specify actions for flags
- No more Edge/Glitch resources available for this pod pair
- No more Pattern resources available for this pod pair
- No Trigger action found in the trace specification
- Slow or Missing Clock
- Timer value checked as an event, but no start action specified
- Trigger function initialization failure
- Trigger inhibited during timing prestore
- Trigger Specification is too complex
- Waiting for Trigger
- Analyzer armed from another module contains no "Arm in from IMB" event
- Specifications and Characteristics
- Concepts
- Understanding Logic Analyzer Triggering
- Understanding State Mode Sampling Positions
- Getting Started
- Glossary
- Index
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Chapter 2: Task Guide
Formatting Labels for Logic Analyzer Probes
3. In the Change Bit Order dialog:
• To reorder the bits individually, enter the bit that the probe channel
should be mapped to.
• To swap the high and low order bytes or words, select the button Big
Endian to Little Endian at the bottom of the dialog.
• To return to sequentially ordered bits, select the button Default Order
at the bottom of the dialog.
4. Select the OK button.
The label now shows an "R" to indicate that the assigned bit has been
reordered.
NOTE: Labels with reordered bits cannot be used as range terms or <, <=,>, >= in
triggers.
To turn labels off or on
When you temporarily want to remove a label and its data, you can turn
off the label. The label name and its bit assignments are preserved.
To turn a label off
1. In the Format tab, select the label button that you want to turn off.
2. Choose Label [ON] to toggle it off.
At least one label must remain on.
To turn a label on
1. In the Format tab, select the label button that you want to turn on.
2. Choose Label [OFF] to toggle it on.
To display a label that was off
1. Turn on the label.
2. At the bottom of the window, select the Apply button.