User's Manual
Table Of Contents
- Agilent Technologies 16750A/B Logic Analyzer
- Agilent Technologies 16750A/B Logic Analyzer
- Contents
- Getting Started
- Step 1. Connect the logic analyzer to the device under test
- Step 2. Choose the sampling mode
- Step 3. Format labels for the probed signals
- Step 4. Define the trigger condition
- Step 5. Run the measurement
- Step 6. Display the captured data
- For More Information...
- Example: Timing measurement on counter board
- Example: State measurement on counter board
- Task Guide
- Probing the Device Under Test
- Choosing the Sampling Mode
- To select transitional timing or store qualified
- Formatting Labels for Logic Analyzer Probes
- Setting Up Triggers and Running Measurements
- Displaying Captured Data
- Using Symbols
- Printing/Exporting Captured Data
- Cross-Triggering
- Solving Logic Analysis Problems
- Saving and Loading Logic Analyzer Configurations
- Reference
- The Sampling Tab
- The Format Tab
- Importing Netlist and ASCII Files
- The Trigger Tab
- The Symbols Tab
- Error Messages
- Must assign Pod 1 on the master card to specify actions for flags
- Branch expression is too complex
- Cannot specify range on label with clock bits that span pod pairs
- Counter value checked as an event, but no increment action specified
- Goto action specifies an undefined level
- Maximum of 32 Channels Per Label
- Hardware Initialization Failed
- Must assign another pod pair to specify actions for flags
- No more Edge/Glitch resources available for this pod pair
- No more Pattern resources available for this pod pair
- No Trigger action found in the trace specification
- Slow or Missing Clock
- Timer value checked as an event, but no start action specified
- Trigger function initialization failure
- Trigger inhibited during timing prestore
- Trigger Specification is too complex
- Waiting for Trigger
- Analyzer armed from another module contains no "Arm in from IMB" event
- Specifications and Characteristics
- Concepts
- Understanding Logic Analyzer Triggering
- Understanding State Mode Sampling Positions
- Getting Started
- Glossary
- Index

55
Chapter 2: Task Guide
To select transitional timing or store qualified
1. In the Sampling tab, select the Timing Zoom button.
2. In the Timing Zoom controls dialog, select the On/Off checkbox.
To set the Timing Zoom trigger position
1. In the Sampling tab, select the Timing Zoom button.
2. In the Timing Zoom controls dialog, select the trigger position.
Specify whether you want to look at Timing Zoom data after the trigger
(Start), before and after the trigger (Center), before the trigger (End), or
use a percentage of the logic analyzer's memory for data after the trigger
(User Defined).
NOTE: When in 333 MHz State mode (16717,18,19), the 400 MHz State mode
(16750,51,52), or the 600 MHz State mode (16753, 54, 55, 56), the start of
Timing Zoom data may occur after the actual trigger point. The reason for this
data mis-alignment is due to how the trigger sequencer functions when in this
mode.
The analyzer sequencer works on Pairs of samples. It will not evaluate the
first sample of the pair until the second sample has entered the sequencer. If
for example the trigger point is determined to be on the first sample, the
analyzer displays the Timing Zoom data relative to the evaluation of the
second sample. What ever time difference is seen between the two samples
(of the pair) is reflected in the data display between the trigger point and the
start of the Timing Zoom data.
This time difference can be noticeable if your measurement is using bursted
clocks and the first sample (actual trigger point) is clocked on the last clock
signal of a burst, and the second sample (of the pair) is clocked with the first
clock of the next burst. The time difference between the clock bursts is
reflected as a mis-alignment between the trigger point and the start of the
Timing Zoom data.
The best thing to do to help mitigate this situation is to set the Timing Zoom to
"Trigger Position End" to capture as much data near the first sample as
possible.