User's Manual
Table Of Contents
- Agilent Technologies 16750A/B Logic Analyzer
- Agilent Technologies 16750A/B Logic Analyzer
- Contents
- Getting Started
- Step 1. Connect the logic analyzer to the device under test
- Step 2. Choose the sampling mode
- Step 3. Format labels for the probed signals
- Step 4. Define the trigger condition
- Step 5. Run the measurement
- Step 6. Display the captured data
- For More Information...
- Example: Timing measurement on counter board
- Example: State measurement on counter board
- Task Guide
- Probing the Device Under Test
- Choosing the Sampling Mode
- To select transitional timing or store qualified
- Formatting Labels for Logic Analyzer Probes
- Setting Up Triggers and Running Measurements
- Displaying Captured Data
- Using Symbols
- Printing/Exporting Captured Data
- Cross-Triggering
- Solving Logic Analysis Problems
- Saving and Loading Logic Analyzer Configurations
- Reference
- The Sampling Tab
- The Format Tab
- Importing Netlist and ASCII Files
- The Trigger Tab
- The Symbols Tab
- Error Messages
- Must assign Pod 1 on the master card to specify actions for flags
- Branch expression is too complex
- Cannot specify range on label with clock bits that span pod pairs
- Counter value checked as an event, but no increment action specified
- Goto action specifies an undefined level
- Maximum of 32 Channels Per Label
- Hardware Initialization Failed
- Must assign another pod pair to specify actions for flags
- No more Edge/Glitch resources available for this pod pair
- No more Pattern resources available for this pod pair
- No Trigger action found in the trace specification
- Slow or Missing Clock
- Timer value checked as an event, but no start action specified
- Trigger function initialization failure
- Trigger inhibited during timing prestore
- Trigger Specification is too complex
- Waiting for Trigger
- Analyzer armed from another module contains no "Arm in from IMB" event
- Specifications and Characteristics
- Concepts
- Understanding Logic Analyzer Triggering
- Understanding State Mode Sampling Positions
- Getting Started
- Glossary
- Index
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Chapter 2: Task Guide
To select transitional timing or store qualified
2. Select the Sampling tab.
3. Choose the Timing Mode option.
You can also select the timing sampling mode in the “Pod Assignment
Dialog” on page 130.
To select the full/half channel configuration
1. In the Sampling tab, with Timing Mode selected, select the timing analyzer
configuration. You can choose between:
• 4M Sample Full Channel 400 MHz
In this configuration, the total memory depth is 4M samples per
channel, with data being sampled and stored as often as every 2.5 ns.
You can set the sample rate to go slower with the Sample Period
control.
NOTE: When the Sample Period is 2.5 ns, data is acquired at two times the trigger
sequencer rate. This means that data must be present for at least two samples
before the trigger sequencer can reliably detect it. The trigger sequencer
could miss data present for less than two sample periods.
The trigger sequencer treats the data as a group of two samples for each
sequencer clock. This means that the trigger point indication could be off by
one sample.
Although the trigger sequencer cannot detect all data, the analyzer will
correctly capture all data present for at least one sample period.
• 8M Sample Half Channel 800 MHz
In this configuration, only one pod of each pod pair is available.
Channels assigned to unavailable pods are ignored. You can specify
which pod to use by toggling the Pod field in Format.
The total memory depth is 8M samples per channel. Data is sampled
and stored every 1.25 ns; this rate cannot be changed.