User's Manual
Table Of Contents
- Agilent Technologies 16750A/B Logic Analyzer
- Agilent Technologies 16750A/B Logic Analyzer
- Contents
- Getting Started
- Step 1. Connect the logic analyzer to the device under test
- Step 2. Choose the sampling mode
- Step 3. Format labels for the probed signals
- Step 4. Define the trigger condition
- Step 5. Run the measurement
- Step 6. Display the captured data
- For More Information...
- Example: Timing measurement on counter board
- Example: State measurement on counter board
- Task Guide
- Probing the Device Under Test
- Choosing the Sampling Mode
- To select transitional timing or store qualified
- Formatting Labels for Logic Analyzer Probes
- Setting Up Triggers and Running Measurements
- Displaying Captured Data
- Using Symbols
- Printing/Exporting Captured Data
- Cross-Triggering
- Solving Logic Analysis Problems
- Saving and Loading Logic Analyzer Configurations
- Reference
- The Sampling Tab
- The Format Tab
- Importing Netlist and ASCII Files
- The Trigger Tab
- The Symbols Tab
- Error Messages
- Must assign Pod 1 on the master card to specify actions for flags
- Branch expression is too complex
- Cannot specify range on label with clock bits that span pod pairs
- Counter value checked as an event, but no increment action specified
- Goto action specifies an undefined level
- Maximum of 32 Channels Per Label
- Hardware Initialization Failed
- Must assign another pod pair to specify actions for flags
- No more Edge/Glitch resources available for this pod pair
- No more Pattern resources available for this pod pair
- No Trigger action found in the trace specification
- Slow or Missing Clock
- Timer value checked as an event, but no start action specified
- Trigger function initialization failure
- Trigger inhibited during timing prestore
- Trigger Specification is too complex
- Waiting for Trigger
- Analyzer armed from another module contains no "Arm in from IMB" event
- Specifications and Characteristics
- Concepts
- Understanding Logic Analyzer Triggering
- Understanding State Mode Sampling Positions
- Getting Started
- Glossary
- Index

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Chapter 2: Task Guide
To select transitional timing or store qualified
Sequence level branching
In transitional timing, only 2 branches are available per sequence level.
Global counters
In transitional timing, only one global counter is available.
Storing Time Tags
Transitional timing requires time tags to recreate the data. Time tags
are either stored in the memory resources of an unused pod pair, or
they are interleaved with the data in memory. If tags are interleaved in
data, available memory depth is reduced by half.
Increasing Duration of Storage
Using the Transitional Label Select dialog to specify selected labels to
ignore can increase usable memory depth and acquisition time by
ignoring transitions on signals like clock or strobe that add little useful
information to the measurement when no other signals are
transitioning.
Invalid Data
The analyzer only looks for transitions on data lines on labels that are
turned on. Data lines on labels that are turned off store data, but only
when one of the lines that is turned on transitions. If the data line on a
label is turned on after a run, or the data line is assigned to a new label,
you would see data, but it is unlikely that every transition that occurred
was captured.
Trigger Position
In transitional timing, no data prestore (samples acquired before
trigger) is required. Therefore, much like state mode, the trigger
position (start/center/end) will indicate the percentage of memory
filled with samples after the trigger. The number of samples acquired/
displayed before trigger will vary between measurements.
To select the timing mode
1. Open the logic analyzer Setup window.