User's Manual
Table Of Contents
- Agilent Technologies 16750A/B Logic Analyzer
- Agilent Technologies 16750A/B Logic Analyzer
- Contents
- Getting Started
- Step 1. Connect the logic analyzer to the device under test
- Step 2. Choose the sampling mode
- Step 3. Format labels for the probed signals
- Step 4. Define the trigger condition
- Step 5. Run the measurement
- Step 6. Display the captured data
- For More Information...
- Example: Timing measurement on counter board
- Example: State measurement on counter board
- Task Guide
- Probing the Device Under Test
- Choosing the Sampling Mode
- To select transitional timing or store qualified
- Formatting Labels for Logic Analyzer Probes
- Setting Up Triggers and Running Measurements
- Displaying Captured Data
- Using Symbols
- Printing/Exporting Captured Data
- Cross-Triggering
- Solving Logic Analysis Problems
- Saving and Loading Logic Analyzer Configurations
- Reference
- The Sampling Tab
- The Format Tab
- Importing Netlist and ASCII Files
- The Trigger Tab
- The Symbols Tab
- Error Messages
- Must assign Pod 1 on the master card to specify actions for flags
- Branch expression is too complex
- Cannot specify range on label with clock bits that span pod pairs
- Counter value checked as an event, but no increment action specified
- Goto action specifies an undefined level
- Maximum of 32 Channels Per Label
- Hardware Initialization Failed
- Must assign another pod pair to specify actions for flags
- No more Edge/Glitch resources available for this pod pair
- No more Pattern resources available for this pod pair
- No Trigger action found in the trace specification
- Slow or Missing Clock
- Timer value checked as an event, but no start action specified
- Trigger function initialization failure
- Trigger inhibited during timing prestore
- Trigger Specification is too complex
- Waiting for Trigger
- Analyzer armed from another module contains no "Arm in from IMB" event
- Specifications and Characteristics
- Concepts
- Understanding Logic Analyzer Triggering
- Understanding State Mode Sampling Positions
- Getting Started
- Glossary
- Index

183
Chapter 3: Reference
Error Messages
expressions must be reduced to 16 and the complexity of some of the
expressions may have to also be reduced.
Branch expressions that are identical (and simple enough to be
combined by a single combiner resource) share the same combiner
resource. Reusing identical event list equations where possible will
optimize the use of combiner resources (see page 183).
You may find more information in the Branch expression is too
complex (see page 171) error message help for the 800 and 1250 Mb/s
modes.
Combiner resource allocation guidelines:
• Labels that span multiple pod pairs (split labels) increases the number of
required combiner resources as compared with labels that are entirely
contained within a single pod pair.
Whenever possible try to arrange the probing such that labels do not span
pod pairs. This is the single most effective way to reduce the number of
required combiner resources.
NOTE: For labels that do span pod pairs the complexity can be reduced to
the same as that of the non-split label case if all bits in the label on all but
one pod pair can be set to Xs in the event list expression for the
measurement.
For example, if label ADDR has it's 16 most significant bits on pod A3 and
16 least significant bits on pod A2 (spanning pod pairs A4/A3 and A2/A1),
the complexity of the compiled expression will be reduced if all 16 most
significant bits or all 16 least significant bits are set to Xs in the pattern
event.
• Event lists with up to 4 unique pattern events can be combined in any
combination of ANDs and ORs by a single combiner resource if all of the
pattern labels are non-split and contained on the same pod pair.
Combining more than 4 labels on the same pod pair will require another
combiner resource.
• Non-split label pattern events from different pod pairs that are ORed
together require an additional combiner resource for each additional pod
pair included in the event list. (ANDing on non-split patterns from
different pod pairs does not increase the required number of combiner