User's Manual
Table Of Contents
- Agilent Technologies 16750A/B Logic Analyzer
- Agilent Technologies 16750A/B Logic Analyzer
- Contents
- Getting Started
- Step 1. Connect the logic analyzer to the device under test
- Step 2. Choose the sampling mode
- Step 3. Format labels for the probed signals
- Step 4. Define the trigger condition
- Step 5. Run the measurement
- Step 6. Display the captured data
- For More Information...
- Example: Timing measurement on counter board
- Example: State measurement on counter board
- Task Guide
- Probing the Device Under Test
- Choosing the Sampling Mode
- To select transitional timing or store qualified
- Formatting Labels for Logic Analyzer Probes
- Setting Up Triggers and Running Measurements
- Displaying Captured Data
- Using Symbols
- Printing/Exporting Captured Data
- Cross-Triggering
- Solving Logic Analysis Problems
- Saving and Loading Logic Analyzer Configurations
- Reference
- The Sampling Tab
- The Format Tab
- Importing Netlist and ASCII Files
- The Trigger Tab
- The Symbols Tab
- Error Messages
- Must assign Pod 1 on the master card to specify actions for flags
- Branch expression is too complex
- Cannot specify range on label with clock bits that span pod pairs
- Counter value checked as an event, but no increment action specified
- Goto action specifies an undefined level
- Maximum of 32 Channels Per Label
- Hardware Initialization Failed
- Must assign another pod pair to specify actions for flags
- No more Edge/Glitch resources available for this pod pair
- No more Pattern resources available for this pod pair
- No Trigger action found in the trace specification
- Slow or Missing Clock
- Timer value checked as an event, but no start action specified
- Trigger function initialization failure
- Trigger inhibited during timing prestore
- Trigger Specification is too complex
- Waiting for Trigger
- Analyzer armed from another module contains no "Arm in from IMB" event
- Specifications and Characteristics
- Concepts
- Understanding Logic Analyzer Triggering
- Understanding State Mode Sampling Positions
- Getting Started
- Glossary
- Index
174
Chapter 3: Reference
Error Messages
1 If (complex event list)
occurs 1 time
then goto next
2 If anything
occurs 1 time
then Goto Next
3 If (complex event list)
occurs 1 time
then Trigger and fill memory
• In 333/400 Mb/s State Modes, the trigger sequence compiler must always
add some additional complexity to the compiled expression for the first
sequence level that is not needed in subsequent sequence levels.
Additional complexity is also required in the first sequence level for the
following 2 conditions:
a. When using the "Find pattern1, or reset on pattern2" trigger function in
333/400 Mb/s State Modes, the event list of the first sequence level
must be combined with reset branch of each subsequent sequence
level by the trigger compiler in order to evaluate the parallelized
samples.
b. When using double edge clocking mode (J Clk rising and falling edges)
in 333 Mb/s State Mode, an additional pattern resource is allocated and
combined with the event list in the first sequence level by the trigger
compiler to prevent triggering on an initial garbage state.
Inserting an "If anything" state as the first state can simplify the complexity
of the compiled event list in the first sequence level and subsequent "If/
Else" sequence levels. The disadvantage is that the sequence will then miss
the first state after the reset condition is met in an "If/Else" sequence level.
If the following sequence does not compile:
1 If (complex event list)
occurs 1 time
then Goto Next
3 If (complex event list)
then Trigger and fill memory
Else if (complex event list)
then Goto 1
This one may:
1 If anything
occurs 1 time
then Goto Next
2 If (complex event list)
occurs 1 time
then Goto Next
3 If (complex event list)
then Trigger and fill memory
Else if (complex event list)
then Goto 1