User's Manual
Table Of Contents
- Agilent Technologies 16750A/B Logic Analyzer
- Agilent Technologies 16750A/B Logic Analyzer
- Contents
- Getting Started
- Step 1. Connect the logic analyzer to the device under test
- Step 2. Choose the sampling mode
- Step 3. Format labels for the probed signals
- Step 4. Define the trigger condition
- Step 5. Run the measurement
- Step 6. Display the captured data
- For More Information...
- Example: Timing measurement on counter board
- Example: State measurement on counter board
- Task Guide
- Probing the Device Under Test
- Choosing the Sampling Mode
- To select transitional timing or store qualified
- Formatting Labels for Logic Analyzer Probes
- Setting Up Triggers and Running Measurements
- Displaying Captured Data
- Using Symbols
- Printing/Exporting Captured Data
- Cross-Triggering
- Solving Logic Analysis Problems
- Saving and Loading Logic Analyzer Configurations
- Reference
- The Sampling Tab
- The Format Tab
- Importing Netlist and ASCII Files
- The Trigger Tab
- The Symbols Tab
- Error Messages
- Must assign Pod 1 on the master card to specify actions for flags
- Branch expression is too complex
- Cannot specify range on label with clock bits that span pod pairs
- Counter value checked as an event, but no increment action specified
- Goto action specifies an undefined level
- Maximum of 32 Channels Per Label
- Hardware Initialization Failed
- Must assign another pod pair to specify actions for flags
- No more Edge/Glitch resources available for this pod pair
- No more Pattern resources available for this pod pair
- No Trigger action found in the trace specification
- Slow or Missing Clock
- Timer value checked as an event, but no start action specified
- Trigger function initialization failure
- Trigger inhibited during timing prestore
- Trigger Specification is too complex
- Waiting for Trigger
- Analyzer armed from another module contains no "Arm in from IMB" event
- Specifications and Characteristics
- Concepts
- Understanding Logic Analyzer Triggering
- Understanding State Mode Sampling Positions
- Getting Started
- Glossary
- Index
173
Chapter 3: Reference
Error Messages
• Cannot AND more than 16 non-split pattern events if the pattern events
are all on the same pod pair.
• Can AND up to 160 non-split pattern events if the pattern events are
evenly distributed across all 10 pod pairs on a 5 card set (16 pattern events
per pod pair).
Specific Guidelines - 333/400 Mb/s State Modes
• Cannot AND or OR more than 8 non-split pattern events if the pattern
events are all on the same pod pair.
• Cannot OR more than 4 non-split pattern events if each pattern event is on
a different pod pair. You can, however, OR 2 patterns together on each of 4
different pod pairs to make a total of 8 patterns ORed across 4 pod pairs.
• Cannot AND or OR more than 4 non-split ranges if the pattern events are
all on the same pod pair.
• Cannot AND or OR more than 2 split equality (=,!=) pattern events.
• Cannot specify more than 1 split inequality (<,<=,>,>=) pattern events.
• Cannot specify any range on a split label.
• In 333/400 Mb/s State Mode, the trigger sequence compiler must combine
elements of the trigger events of the previous sequence level and the next
sequence with the current sequence level, thereby increasing the total
complexity of the current level. A sequence level that may compile fine
when its the only level in the sequence, may be too complex to compile
another level is inserted before or after it.
One possible workaround to this problem is to insert a simple "If anything"
sequence level in between two complex levels. The disadvantage to this
approach, of course, is that the trigger sequence will miss one state in
between the two complex sequence levels.
If the following sequence does not compile:
1 If (complex event list)
occurs 1 time
then Goto Next
2 If (complex event list)
occurs 1 time
then Trigger and fill memory
This one may: