Technical data
2-25
Performance Verification
Performance Test Record
Test Results
Time Interval Accuracy
Performance Test (cont.)
Period Accuracy
Scale Setting Synthesizer
Setting
Min Actual Max
20 ns/div 10 MHz 99.89 ns ________ 100.11 ns
50 ns/div 5 MHz 199.79 ns ________ 200.21 ns
100 ns/div 2 MHz 499.49 ns ________ 500.51 ns
200 ns/div 1 MHz
0.99899 µs
________
1.00101 µs
500 ns/div 500 kHz
1.99799
µs
________
2.00201 µs
1.0 µs/div
200 kHz
4.99499 µs
________
5.00501 µs
2.0 µs/div
100 kHz
9.98999 µs
________
10.01001 µs
5 µs/div
50 kHz
19.980 µs
________
20.02001 µs
10 µs/div
20 kHz
49.950 µs
________
50.05001 µs
20 µs/div
10 kHz
99.900 µs
________
100.10001 µs
Front Panel Cal Signal Cal Output Level
Min Actual Max
Final Result 0.998 ______________Vdc 1.002
Jitter Performance Test
(Standard)
Jitter RMS
Actual Test Limit,
Max
Test Limit ______________ ps _________ ps
Trigger Verification
(Standard and Option
001)
Low Frequency Trigger Hysteresis
Actual Max
Hysteresis ________ mV 40 mV
100 MHz Trigger Sensitivity
Actual Max
Sensitivity ________ mV 40 mV
2.5 GHz Trigger Sensitivity
Actual Max
Sensitivity ________ mV 200 mV
Table 2-5. Performance Test Record (Continued)