Specifications

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Chapter 5: Troubleshooting
Data Path Pass-Thru Test. The Data Path Pass-Thru Test ensures that
incoming data can flow correctly between the comparators and the acquisition
ICs. The gate arrays are programmed for low-speed acquisition, which makes
them invisible to data. The comparators are configured in test mode to drive a
toggling signal on one of the comparator outputs while all other outputs are held
quiet. The activity detectors in the acquisition ICs are monitored to verify that
only the expected signal is toggling. The test is repeated for each comparator
output.
Passing the Data Path Pass-Thru Test implies that incoming data can flow from
the module front end to the acquisition ICs without errors for low speed
acquisition modes (Timing, 200 MHz State, and 400 MHz State acquisition
modes).
Data Path Demux Test. The Data Path Demux Test operates the same as the
Data Path Pass-Thru Test, except the gate arrays are programmed for high-speed
acquisition where the incoming data is demultiplexed to improve throughout.
Passing the Data Path Demux Test implies that incoming data can flow from the
module front end to the acquisition ICs without errors for high speed acquisition
modes (800 MHz State and 1250 Mb/s State acquisition modes).
Comparators V Offset Test. The Comparators V Offset Test completes the
operation check of the comparators. Voltage offset is programmed into the
comparators to ensure proper signal symmetry of the differential signal with
respect to a threshold. The test verifies that the voltage offset can be
programmed at all points throughout the offset range.
Passing the Comparators V Offset Test implies that the comparator voltage offset
is programmable to ensure differential data signals are properly captured.
Comparators Calibration Test. The Comparators Calibration Test runs the
comparator calibration to optimize the performance of the module. Both analog
and digital domain tests are run to optimize signal integrity in the module front
end.
Passing the Comparators Calibration Test implies that the comparators are
completely operational and can be performance optimized. Note that the
resulting calibration factors are not stored.
LA Chip Calibration Test. The LA Chip Calibration Test ensures that each
acquisition IC in the module can perform an operational accuracy self-calibration
every time Run is selected. The module is set in various configurations, after
which the self-calibration routing is initiated. The results of the self-calibration is
then checked to see if self-calibration was successful.
Passing the LA Chip Calibration Test implies that the module can reliably perform
an operation accuracy self-calibration every time Run is selected. Consequently
the incoming data is optimized to reduce channel-to-channel skew so the