Specifications

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Chapter 5: Troubleshooting
master board can arm the module, and that all acquisition ICs can recognize the
arm signal.
EEPROM Test. The EEPROM Test verifies the operation of the module
EEPROM, which stores the operational accuracy calibration factors. The existing
contents of the EEPROM are uploaded into system memory. The EEPROM is
overwritten with test patterns to verify that each cell in the EEPROM can
independently store a 1 or 0. After the test has completed the original contents of
the EEPROM are restored and its checksum verified.
Passing the EEPROM Test implies that the current operational accuracy
calibration factors can be stored and then retrieved for use by the module to
optimize its performance.
ADC Test. The ADC Test verifies the operation on the module analog-to-digital
convertor (ADC) used in the module operational accuracy calibration, probe
adapter identification, and on-board temperature monitoring. The ADC has built-
in test voltage channels which monitors three test voltages. The output of the
channels is then compared with known values.
Passing the ADC Test implies that the analog-to-digital convertor is operating
properly and that the data paths around the ADC can properly pass data.
Probe ID Read Test. The Probe ID Read Test verifies that the analog-to-digital
convertor (ADC) tested above and the on-board digital-to-analog convertor are
operating to read the probe adapter ID. Probe adapter identification is done using
a precision resistor. When the probe adapter is installed onto the probe cable, the
precision resistor completes a voltage divider network. The Probe ID Read Test
exercises the voltage divider network and then reads the voltage across the
precision resistor and compares the voltage to know values.
Passing the Probe ID Read Test implies that any of the compatible probe adapters
can be properly identified, causing the module to configure itself correctly.
Demux Data Arrays Programming Test. The Demux Data Arrays
Programming Test verifies that the gate arrays’ programming bits can be properly
configured. Various test patterns are written to the programming port of the gate
arrays, then read back and compared to expected values.
Passing the Demux Data Arrays Programming Test implied that the gate arrays
can be programmed according to the operating mode of the module.
Comparators Programming Test. The Comparators Programming Test
verifies that the comparators’ programming bits can be properly configured.
Various test patterns are written to the programming port of each comparator,
then read back and compared to expected values.
Passing the Comparators Programming Test implies that the comparators can be
programmed according to the operating mode of the module.