Specifications

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Chapter 5: Troubleshooting
Self-Test Descriptions
The self-tests for the logic analyzer identify the correct operation of major
functional areas in the module.
CPLD Register Test. The CPLD Register Test verifies that the 16700-series
backplane can communicate with the 16760A module CPLD. The CPLD is used to
configure the backplane and the memory devices. The test is done using both a
walking “1” and walking “0” pattern. After the pattern has been stepped, internal
device registers are read.
Passing the CPLD Registers Test implies that the module backplane device can
be properly configured for module setup and data download.
Load FPGA Test. The Load FPGA Test verifies that the backplane interface
device and the data memory control device can be configured. Configuration data
is read from a file. During the configuration process, status signals are checked to
verify the 16760A module hardware is operating properly during the
configuration upload.
Passing the Load FPGA Test implies that the module can be properly configured
for normal operation.
FPGA Register Test. The FPGA Register Test verifies that the read/write