User`s guide

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Table Of Contents

Title Page
- Notices
Contents
Getting Started
- Introduction
- Documentation Map
- Additional Documentation
- System Overview
Introduction and Measurement
- Introducing the GUI
- Designing to Meet Your Needs
  - Beginning
- E5505A Operation: A Guided Tour
  - Required equipment
  - How to begin
- Powering the System On
  - To power on a racked system
  - To power on a benchtop system
- Starting the Measurement Software
- Performing a Confidence Test
- Powering the System Off
Phase Noise Basics
- What is Phase Noise?
  - Phase terms
    - Spurious signals
    - Phase noise
Expanding Your Measurement Experience
- Starting the Measurement Software
- Using the Asset Manager
  - Configuring an asset
- Using the Server Hardware Connections to Specify the Source
- Setting GPIB Addresses
  - To change the GPIB address
- Testing the 8663A Internal/External 10 MHz
- Testing the 8644B Internal/External 10 MHz
- Viewing Markers
- Omitting Spurs
- Displaying the Parameter Summary
- Exporting Measurement Results
Absolute Measurement Fundamentals
- The Phase-Lock-Loop Technique
  - Understanding the Phase-Lock-Loop Technique
  - The Phase-Lock-Loop Circuit
- What Sets the Measurement Noise Floor?
  - The System Noise Floor
  - The Noise Level of the Reference Source
- Selecting a Reference
- Estimating the Tuning Constant
- Tracking Frequency Drift
  - Evaluating beatnote drift
    - Action
- Changing the PTR
  - The Tuning Qualifications
    - Voltage controlled oscillators
    - Signal generators
- Minimizing Injection Locking
  - Adding Isolation
  - Increasing the PLL Bandwidth
- Inserting a Device
  - An attenuator
  - An amplifier
- Evaluating Noise Above the Small Angle Line
  - Determining the Phase-Lock-Loop bandwidth
    - Observing the beatnote
    - Measurement options
Absolute Measurement Examples
- Stable RF Oscillator
- Free-Running RF Oscillator
- RF Synthesizer Using DCFM
- RF Synthesizer Using EFC
- Microwave Source
Residual Measurement Fundamentals
- What is Residual Noise?
  - The noise mechanisms
    - Additive noise
    - Multiplicative noise
- Assumptions about Residual Phase Noise Measurements
  - Frequency translation devices
- Calibrating the Measurement
- Measurement Difficulties
  - System connections
Residual Measurement Examples
- Amplifier Measurement Example
FM Discriminator Fundamentals
- The Frequency Discriminator Method
  - Basic theory
  - The discriminator transfer response
    - System sensitivity
    - Optimum sensitivity
FM Discriminator Measurement Examples
- Introduction
- FM Discriminator Measurement using Double-Sided Spur Calibration
- Discriminator Measurement using FM Rate and Deviation Calibration
AM Noise Measurement Fundamentals
- AM-Noise Measurement Theory of Operation
  - Basic noise measurement
  - Phase noise measurement
- Amplitude Noise Measurement
  - AM noise measurement block diagrams
  - AM detector
    - AM detector specifications
    - AM detector considerations
- Calibration and Measurement General Guidelines
- Method 1: User Entry of Phase Detector Constant
  - Method 1, example 1
  - Method 1, example 2
- Method 2: Double-Sided Spur
  - Method 2, example 1
  - Method 2, example 2
- Method 3: Single-Sided Spur
AM Noise Measurement Examples
- AM Noise with N5500A Option 001
Baseband Noise Measurement Examples
- Baseband Noise with Test Set Measurement Example
- Baseband Noise without Test Set Measurement Example
Evaluating Your Measurement Results
- Evaluating the Results
  - Looking for obvious problems
  - Comparing against expected data
    - The device under test
    - The reference source
- Gathering More Data
  - Repeating the measurement
  - Doing more research
- Outputting the Results
  - Using a printer
- Graph of Results
  - Marker
- Omit Spurs
  - Parameter summary
- Problem Solving
Advanced Software Features
- Introduction
- Phase-Lock-Loop Suppression
  - PLL suppression parameters
- Ignore-Out-Of-Lock Mode
- PLL Suppression Verification Process
- Blanking Frequency and Amplitude Information on the Phase Noise Graph
  - Security level procedure
Reference Graphs and Tables
- Approximate System Noise Floor vs. R Port Signal Level
- Phase Noise Floor and Region of Validity
- Phase Noise Level of Various Agilent Sources
- Increase in Measured Noise as Ref Source Approaches DUT Noise
- Approximate Sensitivity of Delay Line Discriminator
- AM Calibration
- Voltage Controlled Source Tuning Requirements
- Tune Range of VCO for Center Voltage
- Peak Tuning Range Required by Noise Level
- Phase Lock Loop Bandwidth vs. Peak Tuning Range
- Noise Floor Limits Due to Peak Tuning Range
- Tuning Characteristics of Various VCO Source Options
- 8643A Frequency Limits
- 8644B Frequency Limits
- 8664A Frequency Limits
- 8665A Frequency Limits
- 8665B Frequency Limits
System Specifications
- Specifications
- Power Requirements
System Interconnections
- Making Connections
- System Connectors
- System Cables
- Connecting Instruments
PC Components Installation
- Overview
PC Digitizer Performance Verification
- Verifying PC Digitizer Card Output Performance
  - Required equipment
- PC Digitizer Card Input Performance Verification
  - Required equipment
Preventive Maintenance
- Using, Inspecting, and Cleaning RF Connectors
- General Procedures and Techniques
  - Connector Removal
- Instrument Removal
- Instrument Installation
Service, Support, and Safety Information
- Safety and Regulatory Information
- Service and Support
  - Agilent on the Web
- Return Procedure
  - Determining your instrument’s serial number
  - Shipping the instrument

262 Agilent E5505A User’s Guide

FM Discriminator Measurement Examples

Making the measurement

Press the Continue button when you are ready to make the measurement.

Calibrating the measurement

The calibration procedure determines the discriminator constant to use in the

transfer response by measuring the system response to a known FM signal.

Refer to Figure 193 on page 263 through Figure 197 on page 264.

Figure 192 Connect diagram example

e5505a_user_connect_diag_ex

25 Jun 04 rev 3

23dBm

50kHz-1600 MHz

MAXIMUM POWER

20mA MAX

TUNE VOLTAGE

OUT OF LOCK

100kHz

ANALYZERANALYZER

RF ANALYZER

PHASE DET OUTPUT

MONITOR

15dBm MIN

50kHz-1600 MHz

REF INPUT

ERRACT

STATUS

SRQTLKLSN

GPIB

RMT

NOISE

0.01Hz-100 MHz

1V Pk

50kHz-1600 MHz

INPUT

SIGNAL

POSSIBLE

SIGNAL INPUT

100MHz

23dBm

50kHz-1600 MHz

MAXIMUM POWER

30dBm

OUTPUT POWER

POWER

N5500A

Test Set

Spectrum analyzer

Digitizer

input

Digitizer

output

GPIB

Display

Calibration

source

DUT

Power

splitter

Phase

shifter

Delay line

Test set

To test set rear panel

CHIRP input

NOTE

Note that the system must be operating in quadrature during calibration.