Service manual

66
Power Board Circuits
The CV Control circuit compares CV_PROG, which represents what the input voltage should be, to VMON*, which
represents what the input voltage actually is. Similarly, the CC Control circuit compares CC_PROG to IMON*. Either the
CV Control circuit or CC Control circuit, depending on the operating mode and range, generates the programming signal,
PROG, that controls the conduction of the Input Power Stages. The Overvoltage and Current Limit circuits can also control
PROG in case of an overvoltage or overpower condition.
The Overvoltage circuit takes control of the input power stages if an overvoltage condition occurs. The Overvoltage circuit
controls PROG to cause the input stages to increase current flow to limit the input voltage. The OV circuit does not turn off
the input power stages.
The Current Limit circuit limits the load's input current to a value within its rating. The value is set slightly above the
current rating of the module. The circuit is also activated to limit input current when an overpower condition occurs, and at
turn on.
The Overpower Detector circuit monitors the input voltage and input current to determine if an overpower condition exists.
In the event the load begins to operate beyond the power limit boundary, the Overpower Detector turns on the Current Limit
circuit, which overrides the PROG output of either the CV Control or CC Control circuit to limit the load's input current.
Once the power has been returned to a safe operating area, the circuit allows the current to rise again.
There are either four, eight, or sixteen Input Power Stages connected in parallel. Each stage consists mainly of a power FET,
error amplifier, and an input current monitor amplifier. Each FET is connected across the load's + and - Input terminals with
a fuse and current monitoring resistor. The error amplifier in each stage compares the PROG signal from the CV or CC
Control circuits to the actual value of input current to produce an error signal which controls the conduction of each FET to
maintain the voltage or current at the input terminals at the programmed value.
In CC mode, the Input Power Stages will sink a current in accordance with the programmed value of current, regardless of
the input voltage. In CR mode, the Input Power Stages will sink a current linearly proportional to the input voltage in
accordance with the programmed resistance value. In CV mode, the Input Power Stages will attempt to sink enough current
to control the source voltage to the programmed voltage level.
The Input Power Stages also generate UNREG if the FETs are not regulating the input power.
The Status Comparators inform the microprocessor if there is an overvoltage, overpower, or unregulated condition. The
Current, Voltage, and Temperature Monitor circuits return IMON*, VMON*, and TEMP1 signals to the microprocessor.
Module/Mainframe Communication
Figure 4-2 shows how the primary microprocessor on the mainframe GPIB Board determines how many modules are
installed in the mainframe. (Connections of interest are shown by heavier lines.) The modules are daisychained together,
with plug P2 on a module mated to jack J2 on the next lower-numbered module. P2 on the slot 1 module mates to J2 on the
mainframe GPIB Board. Pin P2-6 on each module is grounded.
Therefore, a module installed in slot 1 will cause pin J2-6 on the GPIB Board to be grounded, a module installed in slot 2
will cause pin J2-5 on the GPIB Board to be grounded, etc.
Note that dual-width modules are seen by the mainframe as a single module. The serial data ports on connectors J3/P3 are
similarly daisychained.