Service manual

19
Primary Circuits
The turn-on selftest sequence of the primary microprocessor consists of two parts:
1. The selftest is performed by the primary microprocessor (U203) and starts when the primary clear (
PCLR ) signal goes
false (High). First, the RAM, ROM, and the microprocessor's internal timer selftests are performed. If any of these tests
fail, the front panel display will probably remain blank. The failure can be detected by measuring a square wave on the
SA_GATE line at TP201-8 (see Figure 3-2). The type of failure is indicated as follows:
10Hz square wave--indicates a RAM failure
100Hz square wave--indicates a ROM failure
1KHz square wave--indicates a internal timer failure
Square waves will not have a 50% duty cycle. It is also possible for a selftest failure to ''lock-up" the microprocessor and
cause a blank front panel display and no error square wave to appear on the SA_GATE line. If ''lock-up'' occurs, try to
isolate the problem by performing the Primary Signature Analysis Tests or by replacing U203.
2. If part 1 passes selftest, the test continues and checks the read/write cycles and the internal trigger circuit. If these tests
pass, the primary interface tests are performed. If any test fails, the front panel displays "ERROR x" for two seconds
(see Table 3-2), then normal voltage/current will be displayed and the
Err annunciator will turn on. Depressing the
(blue shift key) followed by the key will cause ''ERROR -330" (SELF-TEST FAIL) to be displayed.
Secondary Circuits
The turn-on selftest sequence of the secondary microprocessor consists of two parts:
1.
The selftest is performed by the secondary microprocessor (U301) and starts when the secondary power clear
(
SPCLR
) signal goes false (High). Any secondary failures are reported to the primary interface. The secondary
microprocessor will first check its internal RAM, ROM, and timer. If one of these tests fail, selftest is halted and
"ERROR xxx" will be displayed (see Table 3-2).
It is possible for a secondary RAM, ROM, or Timer failure to "lock-up" the secondary processor and no secondary error
number is reported. If this occurs try to isolate the problem by performing the Secondary Signature Analysis Tests.
2.
If part 1 passes selftest, the test continues by checking the secondary EEPROM (U342). Next the operation and
accuracy of the main and transient DACs are tested. If these tests pass, the volts/amps readings will appear on the
display indicating that the selftest has been successfully completed.
If the EEPROM or any of the DAC tests fail, or if no module is installed in the mainframe, the front panel displays
''ERROR -xxx" for 2 seconds (see Table 3-2), then "INP DOWN 1" followed by "INPUT DWN". Finally the Err
annunciator will turn on. Depressing the
(blue shift key) followed by the key, will cause "ERROR
-330" (SELF-TEST FAIL) to be displayed. Depressing these keys a second time, will cause "ERROR -240"
(HARDWARE ERROR) to be displayed. Note that Error -240 only appears with secondary component failures.
If error "UNKNOWN" is displayed the EEPROM (U342) must be initialized.
The ''INPUT DWN" message can also occur because of communication problems between the primary and secondary
processor. Check the SRX and STX data lines (test points
and on Table 3-3) for the presence of data pulses
using a logic probe.
''INPUT DWN'' can also occur if the line switch is cycled repetitively, or under certain abnormal line conditions. If this
is the case, cycling ac power to the load will reset the load.