SERVICE MANUAL Multiple Input Electronic Load Mainframes Agilent 6050A and 6051A Part No. 06050-90003 Service Manual For instruments with Serial Numbers: Agilent 6050A US37140101 and Above Agilent 6051A US37140101 and Above For instruments with higher Serial Numbers, a change page may be included. For instruments with lower Serial Numbers, refer to Appendix A. Microfiche Part No.
CERTIFICATION Agilent Technologies certifies that this product met its published specifications at time of shipment from the factory. Agilent Technologies further certifies that its calibration measurements are traceable to the United States National Bureau of Standards, to the extent allowed by the Bureau's calibration facility, and to the calibration facilities of other International Standards Organization members.
SAFETY SUMMARY The following general safety precautions must be observed during all phases of operation, service and repair of this instrument. Failure to comply with these precautions or with specific warnings elsewhere in this manual violates safety standards of design, manufacture, and intended use of the instrument. Agilent Technologies assumes no liability for the customer's failure to comply with these requirements. BEFORE APPLYING POWER.
DO NOT CIRCUMVENT SAFETY DEVICES. AC mains power exists on exposed terminals in various locations in the mainframe and on the load modules. To protect the user against the danger of electric shock, the unit is equipped with a safety interlock that removes as mains power when the top cover is removed. Do not attempt to defeat the function of the safety interlock. DO NOT SUBSTITUTE PARTS OR MODIFY INSTRUMENT.
Table Of Contents Introduction ............................................................................................................................................................................ 7 Scope .................................................................................................................................................................................... 7 Related Documents ...................................................................................................
Post Repair Calibration....................................................................................................................................................... 59 EEPROM Initialization................................................................................................................................................... 59 Principles Of Operation ..........................................................................................................................................
1 Introduction Scope This manual contains information for troubleshooting and repairing the Electronic Load mainframe and modules to the component level. Replaceable-parts lists and circuit diagrams for the mainframe are also provided. Verification procedures are included to aid in determining the performance level either before or after repair. Calibration procedures and specifications for the Electronic Load are included in the Operating Manual.
Safety Considerations The Electronic Load is a Safety Class 1 instrument that has a protective earth terminal. Refer to the Safety Summary page at the beginning of this manual for general safety procedures and the meaning of safety symbols appearing in the manual and on the Electronic Load.
2 Disassembly Procedures Introduction The following procedures will make it easier for you to disassemble major components on the Electronic Load mainframes and Modules. Refer to Figure 5-1 and Table 5-5 for the location of the mainframe mechanical components. Before proceeding with any disassembly, disconnect the ac power cord and remove the top cover. Then proceed to the applicable procedure. Fans 6060A Mainframe • Remove all modules from the unit. • Remove the side covers from the unit.
GPIB Board This assembly contains static sensitive components. Observe all standard electrostatic procedures when removing or replacing the GPIB board (see Chapter 3). • • • • • • • • Remove the modules from the two slots closest to the GPIB board. Remove the left side cover from the unit. Disconnect the keypad/display cable from J203/J202. the power cable from J209, the transformer cable from J206/J207, and the fan cable from J205. Remove the Hex standoffs on the GPIB connector on the rear panel.
• When reinstalling the cable, be sure to line up the cable stripe over the hole marked with a square. Also, make sure the pins are all properly aligned before reinstalling the connector. Line Switch • • • • Remove the front panel (see Front Panel). Record the color code and location of each wire connected to the switch. Disconnect the wires from switch terminals. Release the locking tabs by pressing them inward against the body of the switch and remove the switch.
Note: • • • On the Agilent 60504B/07B modules you must first disassemble the heatsink before you can access the defective subassembly. First remove the three screws that secure the heatsink spacer to the heatsink. Then completely loosen the ten screws that secure the heatsink to the T-bar. Separate the heatsink from the T-bar taking care that the heatsink screws don t fall out of the holes. This makes it easier to reassemble the heatsink.
3 Troubleshooting Most of the procedures described here are performed with power applied and protective covers removed. These procedures should be done only by trained service personnel who are aware of the hazards involved such as electrical shock or fire. Where procedures can be done with power turned off, disconnect the ac line cord from the instrument. Please read the entire procedure and be sure you understand each step before you begin.
Type GPIB Controller Table 3-1 Test Equipment Required for Troubleshooting Purpose Recommend Model Communicate with the load via the GPIB HP9825, Series 85, Series 200/300 Signature Analyzer Test most of the primary and secondary circuits Agilent 5005A/B Digital Voltmeter Check various voltage levels Agilent 3456A Power Source Provide required input, bias GPIB Board Agilent 6032A Logic Probe Check data bus lines Agilent 545A Oscilloscope Check waveforms and signal levels Agilent 1741A Clip
• Keep the work area free of non-conductive objects such as Styrofoam-type cups, polystyrene foam polyethylene bags, and plastic wrappers. Non-conductive devices that are necessary in the area can be kept from building up a static charge by spraying them with an anti-static chemical such as part number 92176S. • Do not wear nylon clothing. Keep clothing of any kind from coming within 12 inches (0,3 m) of static-sensitive devices.
Figure 3-1.
Figure 3-1.
Figure 3-1.
Primary Circuits The turn-on selftest sequence of the primary microprocessor consists of two parts: 1. The selftest is performed by the primary microprocessor (U203) and starts when the primary clear ( PCLR ) signal goes false (High). First, the RAM, ROM, and the microprocessor's internal timer selftests are performed. If any of these tests fail, the front panel display will probably remain blank. The failure can be detected by measuring a square wave on the SA_GATE line at TP201-8 (see Figure 3-2).
Table 3-2. Selftest Error Code Code Error Description PRIMARY PART 2 ERRORS Procedure -4 The primary microprocessor U203 read/write test to the GPIB talker/listener chip U202 failed. Use Primary SA Test Tables 3-4 and 3-6 to check address and data lines. -5 The primary microprocessor U203 test of the internal trigger lines failed. Use Primary SA Test Table 3-7 to check the primary trigger circuit. Then refer to " Trigger Circuit Troubleshooting" and Figure 3-8.
Test Points Table 3-3 lists test points that are referred to in many of the troubleshooting procedures. Each test point is identified by a circled number (e.g., ), the circuit point (e.g., U308-1), and signal name (e.g., CV PROG). The "Measurement and Conditions'' column describes the signal that should be measured and the conditions (e.g. operating mode) required to make the measurement.
Table 3-3. Test Points (continued) Test Point Number U308-1 Signal CV PROG Measurement and Conditions In VOLT MODE, + 10V with full rated voltage programmed; +0.5V with 3 volts programmed. In CURR MODE or RES MODE (middle and high ohm ranges), + 13V. In RES MODE (low ohm range), < 1V. U308-7 CC PROG In CURR MODE, + 10V with full rated current programmed. In VOLT MODE, RES MODE (low ohm range), or with INPUT OFF: - 0.5V. In RES MODE (middle and high ohm ranges), < 1V.
Table 3-3. Test Points (continued) Test Point Number Signal Measurement and Conditions cath-D17 + OV + 14V when OV condition is false (normal). -13V when OV condition is true. U16-1 CC Loop Gain control + 15V when input voltage is more than 2.5V. -15V when input voltage is less than 2.5V. U9-1 NOT USED RNG U14-1 U15-1* -VMON -0.167 X Input Voltage (e.g. -0.167 X 60 = -10.02V) cath D11 + OP - 0.9V (full rated voltage input) to - 6V (zero volts input) when the OP condition is false.
Signature Analysis Note: You cannot use signature analysis to troubleshoot units with the following serial numbers: Agilent 6050A: 3714A05433 and up; US37140101 and up. Agilent 6051A: 3714A00711 and up; US37140101 and up. The easiest and most efficient method of troubleshooting microprocessor based instruments is signature analysis (SA). The SA technique is similar to signal tracing with an oscilloscope in linear circuits.
Test Header Jumper Positions The Electronic Load mainframe contains a primary test header (TP201) located on the GPIB Board, and each module contains a secondary test header (TP301) located on the Control Board. The test headers have jumper positions for signature analysis and other functions as described below. Primary Test Header TP201 Pins 1 and 2 Description + 5V (primary). 3 and 4 With jumper RTP201 installed between these pins, the primary microprocessor is placed in the SA mode.
The following paragraphs describe the setups for troubleshooting the mainframe GPIB Board, and the Control Board and Power Board in the load modules. As a general rule, the GPIB Board is tested first, with no modules connected. Then, the GPIB Board is installed in the mainframe and individual load modules are tested. GPIB Board Troubleshooting Setup To troubleshoot the GPIB Board, it must be removed from the mainframe to allow access to components.
AC mains voltage is present on exposed pins on the top edge of the mainframe GPIB Board and each module whenever the unit is turned on. a. Carefully lay the Control Board and Power Board on an insulated work surface directly next to the mainframe. b. Using extender cables, connect the Control Board to the GPIB Board in the mainframe. c. Make the following connections for signature analysis. 1.
Figure 3-2.
Table 3-4. Primary Microprocessor Signature Analysis Description: These signatures check primary microprocessor U203, ROM U205, and RAM U206. The signatures are valid for ROM U205 firmware revision "Rev A.01.01". Use the test setup described in "Test Setup for S.A.". Connect the signature analyzer's CLOCK input to U207-9.
Table 3-5. GPIB Interface Signature Analysis (Primary) Description: These signatures check the GP-IB talker/listener IC U202. The signatures are valid for ROM U205 firmware revision "Rev A.01.01". Use the test setup described in "Test Setup for S.A." Connect the signature analyzer's CLOCK input to TP201-12 (CS3).
Table 3-6. Front Panel Interface Signature Analysis (Primary) Description: These signatures check the front panel interface IC's U246 U209, U210 and U212. The signatures are valid for ROM U205 firmware revision ''Rev A.01.01". Use the test setup described in ''Test Setup for S.A.". Connect the signature analyzer's CLOCK input to the chip select line of the IC under test as specified below.
Table 3-7. Trigger Circuit Signature Analysis (Primary) Description: These signatures check the operation of the primary trigger circuits. The signatures are valid for ROM U205 firmware revision "Rev A.01.01". Use the test setup described in "Test Setup for S.A.". Connect the signature analyzer's CLOCK input to the IC under test as specified below.
Table 3-7. Trigger Circuit Signature Analysis (Primary) continued U228 - connect CLOCK = TP201-16 (CS7) U228-1 = UFP6 +5V U228-2 = 5505 U228-3 = AAOC U228-4 = 6679 U228-5 = 333F U228-6 = OU39 U228-7 = lP72 U228-8 = OO20 U228-9 = OO10 U228-10 = OOOO com U228-11 = OOOO Pulsing LO U228-12 = OOO8 U228-13 = OO10 U228-14 = OOO8 U228-15 = OOO4 U228-16 = OOO2 U228-17 = OOO4 U228-18 = OOO2 U228-19 = OOO1 U228-20 = UFP6 +5V Table 3-8.
Table 3-9. Fan Speed Control Signature Analysis (Primary) Description: These signatures check the fan speed control circuits. Connect the signature analyzer's clock input to the IC under test as specified below.
Table 3-10. Secondary Microprocessor Signature Analysis Description: These signatures check secondary microprocessor U301 and latches U302 and U330. The signatures are valid for U301 firrnware revisions ''Rev A.02.01". Use the test setup described in "Test Setup for S.A.
Table 3-11. Main DAC, Transient DAC, Data Bus Signature Analysis (Secondary) Description: These signatures check main DAC U320, transient DAC U321, and secondary data bus B latches U319. The signatures are valid for U301 firmware revisions "Rev A.02.01". Use the test setup described in "Test Setup for S.A.".
Table 3-12. Transient Generator Signature Analysis (Secondary) Description: These signatures check transient generator IC's U350 through U355. The signatures are valid for U301 firmware revisions "Rev A.02.01". Use the test setup described in the "Test Setup for S.A.".
Table 3-13. Readback, Slew Rate, Analog Switch Signature Analysis (Secondary) Description: These signatures check the readback DAC U322, slew rate decoder U345, and analog switch U346. The signatures are valid for U301 firmware versions "Rev A.02.01". Use the test setup described in "Test Setup for S.A.".
Table 3-14. Chip Select, Status Readback, EEPROM Decoder Signature Analysis (Secondary) Description: These signatures check the chip select IC U304, the status readback IC U303. The signatures are valid for U301 firmware revisions "Rev A.02.01". Use the test setup described in the ''Test Setup for SA".
Figure 3-3.
If the unit has failed selftest by reporting an error 105-108 at turn-on and no problem can be found using SA, the IMON adjustment may be at fault. Refer to ''POST REPAIR CALIBRATION" and perform the IMON Adjustment. Also, check if the switches in U309 are operating properly. Turn off the SA mode by removing the jumpers. Now check test points , and using the measurement conditions specified in Table 3-3. A switch should close when the applicable test point is a Low level.
SLEW RATE SWITCH SETTINGS Refer to Module Operating Manual for Slew Rate Steps Slew Rate SLW1 SLW2 SLW3 SLW4 #1 HI HI LO HI #2 HI LO LO HI #3 LO HI LO HI #4 HI HI HI HI #5 HI LO HI HI #6 LO HI HI HI #7 HI HI LO LO #8 HI LO LO LO #9 LO HI LO LO #10 HI HI HI LO #11 HI LO HI LO #12 LO HI HI LO CC/CV CONTROL CIRCUIT TROUBLESHOOTING (Figure 3-5) Depending upon which operating mode (and range in the CR mode) is selected, either the CC or the CV loop controls the conduction of the input power stages.
Figure 3-4A.
Figure 3-4B.
Figure 3-4C.
Figure 3-5.
Input Power Stages Troubleshooting (Figure 3-6) There are four, eight or sixteen identical input power stages (depending on the module) connected in parallel. Figure 3-6 shows one, which consists primarily of a power FET (in quad array Q2), a monitor amplifier (U6) and an error amplifier (U5). Schematic details are shown in the corresponding module Power Board schematics.
FSEL TABLE Front Panel Frequency 10000Hz 1000Hz 100Hz 10Hz 1Hz 0 LO HI LO HI LO FSEL INPUTS 1 LO LO HI HI LO 2 LO LO LO LO HI interval between 1µ µs pulses @U350-14 @U351-14 LO 50µs 10µs 500µs 5ms 100µs 1ms 50ms 10ms 500ms Figure 3-6.
Figure 3-7.
Toggle or Pulse Modes To check the transient generator in toggle and pulse modes, run the following program: 10 LOOP 20 OUTPUT 705;"TRAN ON;:TRAN:MODE TOGG'' 30 DISP "TRAN:MODE TOGG" 40 PAUSE 50 OUTPUT 705;"TRAN:MODE PULS'' 60 DISP "TRAN:MODE PULS" 70 PAUSE 80 END LOOP 90 END During the pauses, use a logic probe to make the following checks: Toggle Mode U349-3 = LO U350-3 = LO U351-9, 11, 14 = LO U351-12 = HI Pulse Mode U349-4 = HI U349-14 = toggling U352-13 = toggling After the pause, press "Continue" to
Trigger Circuit Troubleshooting (Figure 3-8) The Multiple Electronic Load can be triggered over the HPIB using the GET function, the *TRIG common command, or the TRIG subsystem HPSL command. The TRIG subsystem lets you select either the ac line frequency, internal timer, or TRIG command as the trigger source. There is also an external TRIGGER input on the mainframe for external trigger inputs.
Level Triggers (*TRG and TRIG command) The following program continuously toggles all labeled signal lines in Figure 3-8 in the indicated direction. 10 LOOP 20 OUTPUT 705;"CURR:LEV;TRIG 5" 30 OUTPUT 705;"TRIG:SOUR BUS" 40 OUTPUT 705;"*TRG" 50 OUTPUT 705;"CURR 1" 60 END LOOP 70 END The next program does essentially the same thing as the previous one except it lets you manually step through the program to toggle the signal lines. Press [Continue] after each pause to continue the program.
Figure 3-8.
Overcurrent Circuit Troubleshooting (Figure 3-9) This circuit limits the maximum current the load can sink for different input voltages and/or power conditions. The primary components in this circuit are amplifier U5 (U12 in 60504B/07B) and transistors Q11 and Q12. At power on the secondary power clear ( SPCLR ) signal provides a High level via D35 to drive U5 (U12 in 60504B/07B) low, turning Q11 on. With Q11 on, PROG goes high (less negative) and turns off the input power FETs.
Figure3-9. Overcurrent Circuit Troubleshooting Overpower Circuit Troubleshooting (Figure 3-10) This circuit limits the power sinking capability of the load to either one to two minutes or 50 milliseconds, depending on the temperature of the heatsink assembly The circuit monitors the input voltage and current to determine if an overpower condition exists. The circuit consists of amplifier U17, the four comparators U10, and summing resistor pack R142.
Figure 3-10. Overpower Circuit Troubleshooting Fan Speed Control Troubleshooting (Figure 3-11) Use extreme caution when troubleshooting the GPIB board when it is removed from the mainframe while connected to AC line voltage. AC line voltage is present throughout the fan speed control circuit located on the lower third of the board. Although removed from the mainframe, the GPIB board must remain connected to the transformer cable, the fan cable, and the line switch cable.
Checking the waveform across U242 pins 4-6 involves circuits that are connected to the ac mains. To lessen the danger of personal injury, the mainframe should be connected to the ac mains through an isolation transformer when checking the fan supply. When checking all other waveforms, connect the oscilloscope common to one of the common points shown in the figure. If the fans do not change speed, use the following chart to troubleshoot the fan speed circuit.
Figure 3-11.
Post Repair Calibration Calibration is required annually and whenever certain components are replaced. If certain control board components (U13-16, U306-308, U320-326, U329) are replaced, the Electronic Load module must be recalibrated as described in the Operating Manual. If any input power stage component is replaced, the Current Monitor (IMON) circuit must be recalibrated. The IMON adjustment procedure is as follows: a. Turn load off. Disconnect any connections to the input terminals. Remove top cover.
4 Principles Of Operation Introduction Figure 4-1 is a block diagram illustrating the major circuits and signals within the Electronic Load. Each block on the diagram identifies the schematic diagram sheet where the circuits are shown in detail. Schematic diagrams for the mainframe, consisting mainly of the GPIB Board, are on foldout pages at the end of this manual. Schematic diagrams for the Control Board and Power Board are provided with the Service Manuals for the individual load modules.
the ac line-synchronization signal derived from the Bias Supply circuits. TRIG_IN is derived from the external trigger signal connected to the rear panel. GET is received directly from the GPIB. P_TRIG* is generated in the primary microprocessor from either the *TRG or TRIG commands received via the GPIB. The Trigger Generator circuit includes the internal timer, which generates trigger signals from the clock (E) and frequency select (FSEL) signals.
Figure 4-1.
Figure 4-1.
Figure 4-1.
Power Board Circuits The CV Control circuit compares CV_PROG, which represents what the input voltage should be, to VMON*, which represents what the input voltage actually is. Similarly, the CC Control circuit compares CC_PROG to IMON*. Either the CV Control circuit or CC Control circuit, depending on the operating mode and range, generates the programming signal, PROG, that controls the conduction of the Input Power Stages.
Figure 4-2.
5 Replaceable Parts Introduction Table 5-4 lists the electrical components and Table 5-5 lists the mechanical components for the Agilent 6050A/6051A Electronic Load Mainframes. These tables provide the following information: • • • • • Reference designation (see Table 5-1) Agilent part number Description of part (see Table 5-2) Manufacturer's Federal Supply Code number (see Table 5-3 for manufacturer's name and address) Manufacturer's part number Refer to Figure 5-1 and 5-2 for component locations.
Table 5-2. Part Description Abbreviations AL CC CER DIP DPDT FF FXD GEN-PURP IC MACH MO Aluminum Carbon Composition Ceramic Dual In-line Package Double Pole Double Throw Flip-Flop Fixed General Purpose Integrated Circuit Machine Metal Oxide PE PD PP PWR RECT SIP TA TC TF W/ Polyester Power Dissipation Polypropylene Power Rectifier Single In-line Package Tantalum Temperature Coefficient Thin Film With Table 5-3.
Table 5-4. Agilent 6050A/6051A Parts List - Electrical Ref. Desig. A3 HP Part No.
Table 5-4. Agilent 6050A/6051A Parts List - Electrical (continued) Ref. Desig. L200,201 Q201 Q207 Q208 Q209,210 Q211 Q212,213 R201 R202 R203,204 R205 R208 R214 R215 R228 R236 R237 R238-241 R242,243 R244 R245 R246 R247 R248 R249 R250 R251 R252 R253 R254 R255 R256 R257 R258 R259 R260 R261 R262 R263 R264-266 R267,268 R269 R270 R271 R272 R273 R274 R275 72 HP Part No.
Table 5-4. Agilent 6050A/6051A Parts List - Electrical (continued) Ref. Desig. R276 R277 R278 R280 R281 R282 R283 R284 R285 R286 R287 R288 R289 R290 R291 R292 R293 R294 R295,296 R297 R298 R299-304 R305,306 R307 R308 R309 R314,315 R316 R317 R318 R319 R320,21 R322 R323 R324 R325 R326 RT1 RT201 RTP201 S202-204 S205 TB201 HP Part No.
Table 5-4. Agilent 6050A/6051A Parts List - Electrical (continued) Ref. Desig. TP201 U201 U202 U203 U204 U205 U206 U207 U208,209 U210 U211 U212 U213 U214 U215 U216 U217 U219 U226 U227,228 U229 U230 U233 U234 U235 U237 U238 U239 U241,242 U243 U245 U246 U247 U248 VR1,2 W1 W2 W3 Y201 74 HP Part No.
Table 5-4. Agilent 6050A/6051A Parts List - Electrical (continued) Ref. Desig. HP Part No. 06050-60002 06051-60002 A1 A2 S1 S201 W6 5063-2304 5020-2713 06060-40001 3101-2862 06050-80006 W7 06632-80002 Mfr.
Table 5-5. Agilent 6050A/6051A Parts List - Mechanical (continued) Ref. Desig. HP Part No. Quantity 5040-5448 1 Description FRONT PANEL ASSEMBLY WINDOW ( A1 ) 5021-8405 5021-8417 I I FRONT FRAME FRONT FRAME 06050-00004 06051-00001 I 1 FRONT SUB-PANEL FRONT SUB-PANEL 06050-00001 06051-00002 06050-00005 0535-0031 0535-1105 3050-0891 0515-0896 0535-0082 1400-0611 5001-0540 1 1 1 6 2 8 4 1 2 2 SCREENED PANEL SCREENED PANEL SPACER (S1) NUT-HEX W/LOCKWASHER (A2 to MP13) SCREW-MACH M3X0.
Table 5-5. Agilent 6050A/6051A Parts List - Mechanical (continued) Ref. Desig. MP32 6050A 6051A MP33 HP Part No.
Figure 5-1.
Figure 5-1.
6 Diagrams Introduction This chapter contains the test point and component location diagram, schematic diagrams, and related tables useful for maintenance of the electronic load mainframe. Similar information for each model of plug-in load module is provided in the module service manuals. Ordinarily, maintenance is done with both a mainframe and at least one module, so the module service manuals should be available for use with this manual.
Table 6-1.
Table 6-1.
Figure 6-1. Keypad Wiring Table 6-2. Component Locations COORDINATES "A'' "B" C201 8.6 -3.7 C202 8.8 -3.2 C203 12.0 -5.2 C205 3.7 -2.1 C206 3.7 -2.3 C207 5.6 -1.5 C208 9.0 -1.3 C209 8.0 -1.3 C210 2.8 -2.8 C211 5.0 -5.7 C214a 4.4 -1.5 C215 3.8 -5.8 C223 10.9 -5.7 C224 1.0 -5.0 C225 1.0 -5.6 C2266 1.6 -5.0 C230 1.9 -2.8 C231 1.2 -4.6 C232 3.7 -1.3 C233 11.1 -5.7 C234 3.4 -0.2 C235 6.8 -1.3 C236 0.6 -3.7 C237 12.5 -4.2 C238 10.7 -4.3 C239 13.1 -5.2 C240 1.1 -3.5 C241 2.5 -1.7 C242 8.5 -3.9 C243 6.7 -4.
Table 6-3. Schematic Diagram Notes 1. All resistors are in ohms ±1%, 1/8 W, unless otherwise specified. 2. All capacitors are in microfarads unless otherwise specified. 3. All unmarked capacitors are 0.047µF. 4. An asterisk negates a signal name. For example, CS2 appears on the schematic as CS2*. 5. Signal lines that are terminated by flags continue on other sheets, and may also go to other locations on the same sheet (see Table 6-3). Note that flags do not indicate signal flow direction.
A Manual Backdating This section describes changes that must be made to the manual so that it applies to instruments with serial numbers lower than those listed on the title page. Look in the following table for the serial number of your instrument, and make only those changes listed for your instrument. Note that for some changes, you may be instructed to update the instrument if certain components are being replaced during repair.
Table 3-4. Primary Microprocessor Signature Analysis Description: These signatures check primary microprocessor U203, ROM U205, and RAM U206. The signatures are valid for ROM U205 firmware revision ''Rev A.01.01". Use the test setup described in "Test Setup for S.A.". Connect the signature analyzer's CLOCK input to U207-9.
Table 3-5. GPIB Interface Signature Analysis (Primary) Description: These signatures check the GP-IB talker/listener IC U202. The signatures are valid for ROM U205 firmware revision "Rev A.01.01''. Use the test setup described in ''Test Setup for S.A.'' Connect the signature analyzer's CLOCK input to TP201-12 (CS3).
Table 3 6. Front Panel Interface Signature Analysis (Primary) Description: These signatures check the front panel interface IC's U246 U209, U210 and U212. The signatures are valid for ROM U205 firmware revision ''Rev A.01.01". Use the test setup described in ''Test Setup for S.A.". Connect the signature analyzer's CLOCK input to the chip select line of the IC under test as specified below.
Table 3-7. Trigger Circuit Signature Analysis (Primary) Description: These signatures check the operation of the primary trigger circuits. The signatures are valid for ROM U205 firmware revision "Rev A.01.01". Use the test setup described in "Test Setup for S.A.". Connect the signature analyzer's CLOCK input to the IC under test as specified below.
Table 3-7. Trigger Circuit Signature Analysis (Primary) continued U228 - connect CLOCK = TP201-16 (CS7) U228-1 = UFP6 +5V U228-2 = 5505 U228-3 = AAOC U228-4 = 6679 U228-5 = 333F U228-6 = OU39 U228-7 = lP72 U228-8 = OO20 U228-9 = OO10 U228-10 = OOOO com U228-11 = OOOO Pulsing LO U228-12 = OOO8 U228-13 = OO10 U228-14 = OOO8 U228-15 = OOO4 U228-16 = OOO2 U228-17 = OOO4 U228-18 = OOO2 U228-19 = OOO1 U228-20 = UFP6 +5V Table 3-8.
Description: These signatures check the fan speed control circuits. Connect the signature analyzer's clock input to the IC under test as specified below.
B "A" Load Modules Troubleshooting This section describes the changes that must be made to the troubleshooting procedures in section 3 of the manual that apply to ''A'' modules. Earlier "A" Load Modules Use the troubleshooting procedures on pages B-2 through B-15 in this appendix when troubleshooting the earlier ''A'' load modules.
Table 3-3. Test Points (continued) Test Point Number Signal CV PROG U308-1 Measurement and Conditions In VOLT MODE, + 10V with full rated voltage programmed; +0.5V with 3 volts programmed. In CURR MODE or RES MODE (middle and high ohm ranges), + 13V. CC PROG U308-7 In RES MODE (low ohm range), 0 to +10V depending upon resistance value programmed. In CURR MODE, + 10V with full rated current programmed. In VOLT MODE, RES MODE (low ohm range), or with INPUT OFF: -13V.
Table 3-3. Test Points (continued) Test Point Number U16-1 Signal CC Loop Gain control NOT USED RNG U9-1 Measurement and Conditions + 15V when input voltage is more than 2.5V. -15V when input voltage is less than 2.5V. Low level when the high current range or the middle resistance range is programmed. High level when the low current range, the low resistance range, or the high resistance range is programmed. -VMON -0.167 X Input Voltage (e.g. -0.167 X 60 = -10.02V). +OP -0.
Table 3-10 Secondary Microprocessor Signature Analysis Description: These signatures check secondary microprocessor U301 and latches U302 and U330. The signatures are valid for U301 firmware revisions ''Rev A.01.01" and "Rev A.01.02". Use the test setup described in "Test Setup for S.A.
Table 3-11. Main DAC, Transient DAC, Data Bus Signature Analysis (Secondary) Description: These signatures check main DAC U320, transient DAC U321, and secondary data bus B latches U319. The signatures are valid for U301 firmware revisions "Rev A.01.01" and Rev A.01.02". Use the test setup described in "Test Setup for S.A.".
Table 3-12. Transient Generator Signature Analysis (Secondary) Description: These signatures check transient generator IC's U310 through U316. The signatures are valid for U301 firmware revisions "Rev A.01.01" and "Rev A.01.02". Use the test setup described in the "Test Setup for S.A.".
Table 3-13. Readback, Slew Rate, Analog Switch Signature Analysis (Secondary) Description: These signatures check the readback DAC U322, slew rate decoder U345, and analog switch U346. The signatures are valid for U301 firmware revisions "Rev A.01.01" and "Rev A.01.02". Use the test setup described in "Test Setup for S.A.".
Table 3-14. Chip Select, Status Readback, EEPROM Decoder Signature Analysis (Secondary) Description: These signatures check the chip select IC U304, the status readback IC U303, and EEROM decoder U341 The signatures are valid for U301 firmware revisions "Rev A.01.01" and "Rev A.01.02". Use the test setup described in the ''Test Setup for SA".
First, check that the SA waveforms shown on Figure 3-3 are correct. If these waveforms are not correct, check the SD0-7 data bus lines to the readback DAC U322 using SA Tables 3-10 and 3-13. Next, check the SDB0-7 data lines to the main (U320) and transient (U321) DACs using SA Table 3-9. If there is a problem on the data lines, SA should isolate the problem to the faulty component.
SLEW RATE SWITCH SETTINGS Refer to Module Operating Manual for Slew Rate Steps Slew Rate SLW1 SLW2 SLW3 HI HI LO #1 HI LO LO #2 LO HI LO #3 HI HI HI #4 HI LO HI #5 LO HI HI #6 HI HI LO #7 HI LO LO #8 LO HI LO #9 HI HI HI #10 HI LO HI #11 LO HI HI #12 SLW4 HI HI HI HI HI HI LO LO LO LO LO LO CC/CV Control Circuit Troubleshooting (Figure 3-5) Depending upon which operating mode (and range in the CR mode) is selected, either the CC or the CV loop controls the conduction of the input power stages.
Figure 3-4.
Figure 3-5.
Input Power Stages Troubleshooting (Figure 3-6) There are four, eight or sixteen identical input power stages (depending on the module) connected in parallel Figure 3-6 shows one, which consists primarily of a power FET (in quad array Q2), a monitor amplifier (U6) and an error amplifier (U5). Schematic details are shown in the corresponding module Power Board schematics.
Transient Generator Troubleshooting (Figure 3-7) The transient generator (U310-U316) allows the input power stages to switch between two load levels. It produces the HIGH control signal which is sent to the DAC circuits to switch the transient DAC output. Troubleshooting the transient circuit consists of checking the output of U314-7, the frequency and FSEL inputs to U311, the trigger inputs to U311 and U314, and the outputs of U312 and U313.
Figure 3-7.
Overcurrent Circuit Troubleshooting (Figure 3-9) This circuit limits the maximum current the load can sink for different input voltage and/or power conditions. The primary components in this circuit are amplifier U14 and transistors Q11 and Q12. At power on the secondary power clear ( SPCLR ) signal provides a High level via D35 to drive U14-7 Low turning Q11 on. With Q11 turned on, IPROG goes High (less negative) and turns off the input power FETs (load will not sink current).
Figure 3-9. Overcurrent Circuit Troubleshooting Overpower Circuit Troubleshooting (Figure 3-10) This circuit limits the power sinking capability of the load to one of two different power ranges depending upon the temperature of the input power FET heat sink assembly. The circuit monitors the input voltage and the input current in order to limit the current when an overpower condition exists.
Figure 3-10.
Index B Bias supplies ....................................................................................................................................................17, 21, 63 C Calibration ...................................................................................................................................................................61 CC/CV control ........................................................................................................................................
Manual backdating.......................................................................................................................................................87 Manual revisions............................................................................................................................................................9 Mechanical parts.......................................................................................................................................................
