Operating instructions
Status Reporting
85
Channel Summary
The Channel Summary registers can summarize the channel status conditions of up to six channels. The channel/bit
assignments in the Channel Summary registers are as follows:
Channel Bit Value
Channel 1 1 2
Channel 2 2 4
Channel 3 3 8
Channel 4 4 16
Channel 5 5 32
Channel 6 6 64
When an enabled bit in the Channel Status Event register is set, it causes the corresponding channel bit in the Channel
Summary Event register to be set. Reading the Channel Summary Event register resets it to zero.
The Channel Summary Enable register can be programmed to specify which channel summary event bits from the existing
channels are logically-ORed to become Bit 2 (CSUM bit) in the Status Byte register. For single electronic loads, only
Channel exists.
Table 5-1. Channel Status Bit Description
Mnemonic Bit
1
Value Meaning
VF 0 1 Voltage Fault. Either an overvoltage or a reverse voltage condition has
occurred on a channel. When either of these conditions occur, Bit 0 is set
and remains set until INP:PROT:CLE is programmed. Note that this bit
reflects the active state of the Flt pin on the back of the unit.
OC 1 2 Overcurrent. An overcurrent condition has occurred on a channel. This
condition sets Bit 1 if the current exceeds 102% of the rated current, or if
the current exceeds the user-programmed current protection level. If the
overcurrent condition is removed, Bit 1 is cleared.
However, if the user-programmed overcurrent condition persists beyond
the user-programmed current protection delay time, Bit 13 is also set and
the channel is turned off. In this case, Bits 1 and 13 remain set until the
overcurrent condition is removed and INP:PROT:CLE is programmed.
OP 3 8 Overpower An overpower condition has occurred on a channel. This
condition sets Bit 3 when the internal overpower protection circuit is
limiting the input power. This occurs if the unit exceeds the rated power
of a channel.
However, if an overpower condition occurs and persists for more than 3
seconds. Bit 13 (PS bit) is also set and the channel is turned off. In this
case, Bits 3 and 13 remain set until the overpower condition is removed
and INP:PROT:CLE is programmed.