Operating instructions

Language Dictionary
65
STAT:QUEStionable Channel-Independent Questionable Status Command/Queries
Description
The Questionable Status register group provides information that some data or parameters
may be unreliable. The Questionable Status registers monitor the same conditions as the
Channel Status group. However, the Questionable Status monitors a specified condition for
all channels in the multiple electronic load and sums them into the QUES (Questionable
Summary) bit of the Status Byte register. This permits the controller to use a single
command to determine if the specified condition exists on any of the channels. All
commands associated with this group are valid with single electronic loads, but in that case
the Questionable and Channel Status registers will hold the same information. The
following three Channel Status registers are associated with each channel:
Condition Real-time ("live") recording of Questionable data.
Event Records all Questionable conditions that occurred since the last time the
register was read.
Enable Mask for selecting which bits on the Event register are allowed to
be summed into the QUES bit of the Status Byte register.
Bit Configuration of Questionable Status Registers
1
Bit Position
15,14 13 12 11 10 9 8-5 4 3 2 1 0
Condition
1
NU PS OV RV UNR EPU NU
2
TE
2
PE NU
2
CE
2
VE
Bit Weight
8192 4096 2048 1024 512 16 8 2 1
1
NU = Not Used
2
All signals are the same as the Channel Status Condition register.
Different mnemonics are required by the HPSL standard.
Note
See Chapter 5 - Status Reporting for a explanations of the bit mnemonics.
Command/Query Syntax
Query
Function
STATus:QUEStionable:CONDition?
Returns the binary value of the Questionable Status Condition register, which
represents real-time status of possible electronic load malfunctions. A condition
exists if the corresponding bit = 1.
STATus:QUEStionable [:EVENt]?
Returns the binary value of the Questionable Status Event register, which
latches each 0-to 1 transition of the condition of the Questionable Condition
register the first time it occurs. The bit remains 1 even if the original condition
has since disappeared. Reading this register resets it to zero.
STATus:QUEStionable:ENABle
A mask that specifies which bits of the Questionable Event register can be
summed into the QUES bit of the Status Byte register. Set the bit to l to enable
the corresponding event. Program MAX to enable all allowable bits or MIN to
disable them.
STATus:QUEStionable:ENABle?
Returns the binary mask value of the Questionable Status Enable register.