Specifications

48
Chapter 3: Testing Performance
To Test the Single-clock, Single-edge, State Acquisition
To Test the Single-clock, Single-edge, State Acquisition
Testing the single-clock, single-edge, state acquisition verifies the performance of
the following specifications:
• Minimum master to master clock time
• Maximum state acquisition speed
•Setup/Hold time
This test checks a combination of data channels using a single-edge clock at two
selected setup/hold times.
Equipment Required
Set up the equipment
If you have not already done so, do the procedure “To Set up the Test Equipment
and the Analyzer” on page 38. Ensure that the pulse generator and oscilloscope
are set up according to the tables in that section.
Set up the logic analyzer
1 Set up the Sampling tab.
a In the Analyzer setup window, select the Sampling tab.
b Select State Mode.
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