Service Guide 4
Agilent 35670A Supplement 41
Figure 20 CPU Block Diagram: Interface
Display
Controller
Video
Gate
Array
Frame Buffer1
Frame Buffer2
Video
DAC
Buffer TTL
Serializer
External
Display
Connector
Inverter
LCD
CCFL
backlights
R
G
B
VSYNC
HSYNC
LVD Data
Inverter control
VSYNC
HSYNC
RGB Data Bus
Real Time Clock
