Programming instructions

68 Verification Tests
Figure 4-4. DIO Modules Test Fixture
This fixture is applicable for the Agilent 44474A 16-bit DIO. For Agilent
N2263A/64A/65A, the line CHAN CLOSED does not exist. For Agilent
N2263A 32-bit DIO, the related data lines (i.e. the first bit in ports s00, s01,
s02 and s03, and so on) in each of the four 8-bit ports are connected together
to simplify the data lines testing.
Tests Procedure The Verification Tests for a DIO module consist of:
a. Data lines input/output tests;
b. The CHAN CLOSED
[1]
and PFLG/EXT INC tests;
c. The IO/WR and PCTL/RD tests.
Data Lines Input/Output
Tests Procedure:
1. Remove the wiring terminal block from the DIO module and install
the related test fixture onto it;
2. Press Card Reset to reset the DIO module, all the ports in this
:,5,1*
7(50,1$/
%/2&.
7(67),;785(:,5,1*
72',202'8/( 
  

L0 L7 L6 L5 L4 L3 L2 L1 H0 H7 H6 H5 H4 H3 H2 H1 GND PCTL/RD CHAN CLOSED*
GND PFLG/EXT INC IO/WR
GND IO/WR PCTL/RD
7KHOLQH&+$1&
/
2
6('RQO\H[LVWVRQWKH




$




E
L
W

'
,
2

IRU1$E
L
W

'
,2DQG1$$


E
L
W

'
,
2

P
R
G
X
O
H
V

WKLVOLQHGRHVQR
W

H
[LVW
[1]. The line Channel Closed is for the Agilent 44474A 16-bit DIO only.