User`s guide

Remarks
The following table lists the bit definitions for the Status Byte Register.
Bit Number
Decimal
Value
Definition
0 Not used 1 Always zero.
1 Not Used 2 Always zero.
2 Error Queue 4
One or more errors have been
stored in the Error Queue. Use
the SYSTem:ERRor? command
to read and delete errors.
3 Questionable
Data Summary
8
One or more bits are set in the
Questionable Data Register
(bits must be enabled, see
STATus:QUEStionable:ENABle
command).
4 Message
Available
16
Data is available in the
instrument's output buffer.
5 Standard Event
Summary
32
One or more bits are set in the
Standard Event Register (bits
must be enabled, see *ESE
command).
6 Master Summary 64
One or more bits are set in the
Status Byte Register and may
generate a Request for Service
(RQS). Bits must be enabled
using the *SRE command.
7 Standard
Operation
Summary
128
One or more bits are set in the
Standard Operation Register
(bits must be enabled, see
STATus:OPERation:ENABle
command).