Specifications

27
16800 Series Interfaces
Peripheral interfaces
Display 15-pin XGA connector, DVI
Keyboard PS/2
Mouse PS/2
Serial 9-pin D-sub
PCI card expansion slot 1 full profile
USB Six 2.0 ports, two in front, four in rear
Connectivity interfaces
LAN 10Base-T, 100Base-T, 1000Base-T
Connector RJ-45
Interface with external instrumentation
Trigger or arm external devices or receive signals that can be used to arm measurement hardware within the logic analyzer with
Trigger In/Out
Trigger in
Input Rising edge or falling edge
Action taken When received, the logic analyzer takes the actions described in the trigger sequence step
Input signal level ± 5 V max
Threshold level Selectable: ECL, LVPECL, LVTTL, PECL, TTL
User defined (± 5 V in 50 mV increments)
Minimum signal amplitude 200 mV
Connector BNC
Input resistance 4 kΩ nominal
Trigger out
Trigger Rising edge or falling edge. OR of selected events that cause Trigger Out (logic analyzer trigger or
flags)
Output signal VOH (output high level) 2.0 V min
VOL (output low level) 0.5 V max
Pulse width approx. 80 to 160 ns
Threshold level LVTTL (3.3 V logic)
Signal load 50 Ω (For good signal quality, the trigger out signal should be terminated in 50 Ω to ground)
Connector BNC